基于链表管理的PCIe交换机动态缓存技术  

Dynamic cache technology of PCIe switch based on linked list management

作　　者：王周 祝红彬 朱喜 高昌垒 WANG Zhou;ZHU Hongbin;ZHU Xi;GAO Changlei(Shenzhen Statemicro Electronics Co.,Ltd.,Shenzhen 518000,China)

机构地区：[1]深圳市国微电子有限公司,广东深圳518000

出　　处：《电子设计工程》2024年第3期157-160,165,共5页Electronic Design Engineering

摘　　要：缓存是PCIe交换机数据交互时的重要性能参数。较小的缓存在流量过大时会迅速被占满导致溢出;而较大的缓存会增加寻址延迟以及芯片面积。传统解决方案多是对每个交换机端口分配固定缓存,同时设置共享缓存空间,但端口未使能时固定缓存就形成了浪费。基于避免空间浪费同时减小延迟和芯片面积的目的,采用了链表管理的动态缓存方法,将未使能端口的缓存空间动态链接到活跃端口。结合EDA以及FPGA验证,同时流片后成功通过测试,能够适应于交换机各类复杂的工作场景,在满足功能并具有高性能的同时,缓存利用率可达100%,且无需额外共享缓存空间,有效减少了缓存区的面积资源消耗。The cache is an important performance parameter for data interaction of PCIe switches.Smaller caches will be filled quickly when the traffic is too large,resulting in overflow;Larger buffers will increase addressing latency and chip area.In traditional solutions,each switch port allocates a fixed cache and sets a shared cache space,but the fixed cache is wasted when the port is not enabled.In order to avoid space waste and reduce the delay and chip area at the same time,a dynamic cache method based on linked list management is adopted to dynamically link the cache space of non enabled ports to the active ports.Combined with EDA and FPGA verification,and successfully passed the test after tape⁃out,it can adapt to all kinds of complex working scenarios of the switch.While meeting the function and having high performance,the cache utilization rate can reaches 100%,and no additional shared cache space is required,effectively reducing the area and resource consumption of the cache area.

关 键 词：交换机 面积 延迟 动态缓存 链表管理 

分 类 号：TN492[电子电信—微电子学与固体电子学]