检索规则说明:AND代表“并且”;OR代表“或者”;NOT代表“不包含”;(注意必须大写,运算符两边需空一格)
检 索 范 例 :范例一: (K=图书馆学 OR K=情报学) AND A=范并思 范例二:J=计算机应用与软件 AND (U=C++ OR U=Basic) NOT M=Visual
作 者:金东灿 杨振国 周位强 杜显彬 JIN Dongcan;YANG Zhenguo;ZHOU Weiqiang;DU Xianbin(SUPCON Technology Co.,Ltd.,Hangzhou 310053,China)
出 处:《电子设计工程》2024年第4期75-79,共5页Electronic Design Engineering
摘 要:DCS工业应用场景下,以太网接口需要满足EMC浪涌抗扰度测试3A等级的要求。文中针对以太网百兆电口在浪涌抗扰度测试中出现Link Down故障导致控制趋势跳变这一问题,通过对影响百兆PHY芯片Link Down的主要因素进行理论分析,结合测试结论设计了干扰发生器,并对各厂商的PHY芯片进行浪涌测试和模拟干扰测试。证明了浪涌试验下PHY芯片的差分输入信号畸变时间大于厂商设置的耐受时间导致网口Link Down这一猜想的正确性和模拟干扰测试方法的可靠性。明确了TANS_MAX>150μs作为DCS工业应用场景下PHY芯片选型指标,为芯片选型提供依据。In the DCS industrial application scenario,the Ethernet interface needs to meet the requirements of the EMC surge immunity test 3A level.In the surge immunity test.The Link Down fault of the Ethernet100 M copper port caused the change of the control trend during the surge immunity test.Through theoretical analysis and test conclusion,the interference generator is designed.Perform surge immunity test and simulated interference test on PHY chips of various manufacturers.It is proved that the differential input signal distortion time of the PHY chip is greater than the tolerance time set by the manufacturer during the surge immunity test,resulting in the Link Down of the port.And the reliability of the simulated interference test method is proved.It is clear that TANS_MAX>150 μs is used as the PHY chip selection indicator in the DCS industrial application scenario,which provides a basis for chip selection.
关 键 词:以太网 浪涌(冲击)抗扰度试验 EMC 100BASE-TX
分 类 号:TN915.03[电子电信—通信与信息系统]
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在链接到云南高校图书馆文献保障联盟下载...
云南高校图书馆联盟文献共享服务平台 版权所有©
您的IP:3.147.72.3