基于失配转换的DWA和RDWA分析与建模  

The Analysis and Modeling of DWA and RDWA Based on Mismatch Conversion

作　　者：马洪威 MAHong-wei(Sichuan Institute of Industrial Technology,Deyang 618500,Sichuan)

机构地区：[1]四川工业科技学院电子信息与计算机工程学院,四川德阳618500

出　　处：《电脑与电信》2023年第10期86-90,94,共6页Computer & Telecommunication

摘　　要：提出一种关于多位ΣΔM反馈DAC单元失配的转换方法,在此基础上建立了DWA和RDWA的Simulink模型,然后通过系统仿真加以验证。通过建立数学模型将电容单元失配转化为电压参考失配,可避免在积分器模型中使用单元阵列,从而简化整个ΣΔM的建模方案。DWA建模时,初始和终止指针联合指示单元选择地址,并在每次采样时根据输入数据对其进行更新。RDWA模型引入了控制MTBS的随机变量,能追踪显示单元阵列切换次数。仿真显示,DWA模型可精确反映对多位反馈DAC非线性误差的一阶整形,RDWA模型则能有效滤除由非线性误差引起的谐波失真,从而证实了该失配转换算法和所建立模型的有效性及可靠性。This paper presents a conversion method associated with the unit capacitor cell mismatch of the feedback DAC in multi-bitΣΔM.Based on it,Simulink models of the DWA and RDWA are built up,respectively,furthermore,verified through system simulation.It can be avoided that the unit cell array is employed by the integrator model,given that the mismatch is transformed from the unit cell into the voltage reference utilizing the mathematical model.This way,a simplification of modeling scheme of the whole multi-bitΣΔM is made.During modelling of DWA,the initial and termination pointer jointly indicate the unit cells’address selected,updating according to input data each time sampling.A random variable controlling MTBS is introduced by the RDWA model,capable of tracing and displaying the switching number of unit cell array.Simulation results show that the 1st order noise shaping of the nonlinearity error can be reflected accurately by the DWA model,and the RDWA model enables filtering out the harmonic distortion efficiently,so it’s confirmed that both the algorithm for mismatch conversion and the models built are reliable.

关 键 词：多位ΣΔ调制器 旋转数据加权平均 失配转换 行为级建模 平均切换时间 

分 类 号：TN792[电子电信—电路与系统]