单对线以太网物理层模拟前端设计思考  

Thinking on single-pair ethernet physical layer analog front-end design

作　　者：谷东明 曹炜 GU Dongming;CAO Wei(HiSilicon Technologies Co.,Ltd.,Shanghai 201206,China)

机构地区：[1]深圳市海思半导体有限公司,上海201206

出　　处：《微电子学与计算机》2024年第2期44-51,共8页Microelectronics & Computer

摘　　要：单对线以太网是近年来新兴的以太网技术,随着汽车自动驾驶和工业物联网的高速发展,凭借上层应用扩展和底层布线上的绝对优势,正在大规模应用。单对线以太网物理层模拟前端技术是实现单对线以太网通信的关键基础技术。本文讲述了现有单对线以太网物理层模拟前端相关的标准,架构及相关模块设计技术,重点对发射器TX和接收器RX关键模块的现有实现技术及其优缺点进行了列举分析。发射器TX电流模结构易于实现高精度但功耗效率低,电压模结构精度略低但功耗效率更高;接收器RX的设计围绕模拟数字转换器(Analog-to-Digital Converter,ADC)展开,ADC决定着整个RX的性能、功耗、面积和复杂度,分段和重新装配(Segmentation And Reassembly,SAR)ADC是首选结构,应用上限不断提高。由此进一步明确了在高性能、低功耗、小面积的单对线以太网物理层模拟前端设计中的挑战。Single-Pair Ethernet(SPE)is a new Ethernet technology in recent years.With the rapid development of automobile self-driving and industrial Internet of Things(IoT),SPE is being used on a large scale with its absolute advantages of upper-layer application expansion and bottom-layer cabling.SPE physical layer analog front-end technology is the key basic technology to realize SPE communication.This paper describes the existing standards,architecture and relevant module design technologies related to the physical layer analog front-end of SPE,focusing on the existing implementation technologies of TX and RX key modules and their advantages and disadvantages.TX current-mode structure is easy to achieve high accuracy but low power consumption efficiency,while voltage-mode structure has slightly lower accuracy but higher power consumption efficiency.The design of RX is carried out around Analog-to-Digital Converter(ADC),which determines the performance,power consumption,area and complexity of the whole RX.Segmentation And Reassembly(SAR)ADC is the preferred structure,and the upper limit of application continues to increase.This further identifies the challenges in the design of high-performance,low-power,small-area SPE physical layer analog front-end.

关 键 词：单对线以太网 物理层 模拟前端 

分 类 号：TN432[电子电信—微电子学与固体电子学]