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作 者:张翠玲 陈建宾 ZHANG Cui-ling;CHEN Jian-bin(College of Physics,Taiyuan University of Technology,Jinzhong 030600,China)
出 处:《现代化工》2024年第3期182-187,共6页Modern Chemical Industry
基 金:山西省回国留学人员科研资助项目(2021-031)。
摘 要:In和Nb共掺杂TiO_(2)(INTO)陶瓷在100 kHz以下的巨大介电常数源于内部势垒层电容效应。根据这种电容效应,通过增加晶界对介电性能的贡献来降低其低频介电损耗。因此,将La掺杂到INTO陶瓷中,通过细化晶粒并增加晶界数量来降低陶瓷制备过程中的能耗。结果表明,La掺杂减小了INTO陶瓷的晶粒尺寸,增加了陶瓷中晶界的数量,并且陶瓷中析出LaNbTiO_(6)二次相,在陶瓷晶粒之间形成高阻态的相界,降低陶瓷的低频介电损耗,优化了陶瓷介电常数的频率稳定性。The huge dielectric constant of In-Nb co-doped TiO_(2)(INTO)ceramics below 100 kHz is due to the capacitance effect of the internal barrier layer.Based on this capacitance effect,the low-frequency dielectric loss of grain boundaries can be reduced by increasing their contribution to dielectric properties.Therefore,La is doped into INTO ceramics to refine grains and increase the number of grain boundaries,which will reduce energy consumption during the ceramic preparation process.It is shown that La doping reduces the grain size of INTO ceramics,increases the number of grain boundaries in the ceramics,and precipitates LaNbTiO_(6)secondary phase in the ceramics,which forming high resistance phase boundaries between ceramic grains,reducing the low-frequency dielectric loss of the ceramics,and optimizing the frequency stability of the dielectric constant of the ceramics.
关 键 词:共掺杂TiO_(2)陶瓷 内阻挡层电容效应 低频介电损耗 晶界数量 相界
分 类 号:TM283[一般工业技术—材料科学与工程]
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