基于链式存储结构的ADS-B信号解码系统设计与实现  

Design and implementation of ADS-B signal decoding system based on chain storage structure

作　　者：王飘 李亚柯 陈镇山 王玉香 WANG Piao;LI Yake;CHEN Zhenshan;WANG Yuxiang(College of Mechanical and Engineering,Fujian Agriculture and Forestry University,Fuzhou 350100,China;Quanzhou Institute of Equipment Manufacturing Haixi Institutes,Chinese Academy of Sciences,Quanzhou 362200,China)

机构地区：[1]福建农林大学机电工程学院,福州350100 [2]中国科学院海西研究院泉州装备制造研究中心,泉州362200

出　　处：《集成电路与嵌入式系统》2024年第3期77-81,共5页INTEGRATED CIRCUITS AND EMBEDDED SYSTEMS

摘　　要：针对传统ADS-B信号解码系统的问题,如解码准确率低、数据传输速率小和解码实时性差,本文基于AD9361和Xilinx的Zynq-7000通用软件无线电平台提出了解决方案。该方案通过提高ADS-B信号采样率来提高解码准确率,并进行原理阐述和验证。此外,为了应对采样率增加导致的数据量增加问题,引入了链式存储结构作为DMA的缓存区域。实验结果表明,与传统解码系统相比,本文提出的系统识别并解码ADS-B信号的准确率提高了10%。链式存储结构的引入提高了数据处理速度,满足飞机航迹实时显示需求。此外,该系统的数据传输速率最高可达到682 Mb/s,满足高速数据传输的需求。To solve the problems of traditional ADS-B signal decoding system,including low decoding accuracy,low data transmission rate and poor real-time decoding,this paper proposes a solution based on AD9361 and Xilinx's Zynq-7000 universal software radio plat-form.The scheme improves the decoding accuracy by improving the ADS-B signal sampling rate,and the principle is explained and veri-fied.In addition,in order to deal with the problem of increasing data volume due to increasing sample rate,we introduce the chain storage structure as the cache area of DMA.The experiment results show that compared with the traditional decoding system,the proposed sys-tem can recognize and decode ADS-B signals with 10%higher accuracy.The introduction of chain storage structure improves the data processing speed and meets the demand of aircraft track real-time display.In addition,the data transmission rate of the system can reach up to 682 Mb/s to meet the needs of high-speed data transmission.

关 键 词：ADS-B ZYNQ-7000 链式存储结构 解码系统 AD9361 

分 类 号：TN859[电子电信—信息与通信工程]