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作 者:肖蝶 冯全源[1] XIAO Die;FENG Quanyuan(Institute of Microelectronics,Southwest Jiaotong University,Chengdu 611756,China)
机构地区:[1]西南交通大学微电子研究所,四川成都611756
出 处:《电子元件与材料》2024年第1期67-72,共6页Electronic Components And Materials
基 金:国家自然科学基金(62090012);四川省重点研发项目(2023YFG0004)。
摘 要:为了减少浮空P区IGBT结构的栅极空穴积累,改善结构的电磁干扰(EMI)噪声问题,从而提高结构电磁干扰噪声与开启损耗(Eon)之间的折中关系,研究提出了一种具有多晶硅阻挡层的FD-IGBT结构。新结构在传统结构的浮空P区上方引入一块多晶硅阻挡层,阻挡层接栅极,形成与N型漂移区的电势差。新结构在器件开启过程中,多晶硅阻挡层下方会积累空穴,导致栅极附近积累的空穴数量减少,从而降低浮空P区对栅极的反向充电电流。通过TCAD软件仿真结果表明,相比于传统FD-IGBT,新结构开启瞬态的过冲电流(I_(CE))和过冲电压(V_(GE))的峰值分别下降26.5%和8.6%,且在栅极电阻(R_(g))增加时有更好的电流电压可控性;相同开启损耗下,新结构的dI_(CE)/dt、dV_(CE)/dt和dV_(KA)/dt最大值分别降低26.5%,15.1%和26.1%。To reduce hole accumulation and electromagnetic interference(EMI)noise in floating P-base IGBT structure,a FD-IGBT structure was proposed with poly barrier layer,which improved the trade-off relationship between the EMI and turn-on loss(Eon).The new structure has a poly barrier layer connected to the gate over the floating P-base,which results in a potential difference between the poly barrier layer and the drift region.The holes can be accumulated under the poly barrier layer at the turn-on state,which decreases accumulated holes near the gate and the reverse charge current from the floating Pbase to the gate.Compared with conventional FD-IGBT,the simulation results by TCAD software show that the peak overshoot current(I_(CE))and overshoot voltage(V_(GE))for the new FD-IGBT structure are reduced by 26.5%and 8.6%,respectively.Moreover,better controllability on current and voltage is improved at higher gate resistance(R_(g)).For the same turn-on loss,the maximum values of dI_(CE)/dt,dV_(CE)/dt and dV_(KA)/dt of the new FD-IGBT are reduced by 26.5%,15.1%and 26.1%,respectively.
关 键 词:电磁干扰噪声 开启损耗 浮空P区 多晶硅阻挡层 栅极反向充电电流
分 类 号:TN386.1[电子电信—物理电子学]
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