一种基于FPGA的eMMC寿命验证的方法  

A method of eMMC lifetime verification based on FPGA

作　　者：虞亚君 王小龙 邵春伟 郝国峰 沈小波 Yu Yajun;Wang Xiaolong;Shao Chunwei;Hao Guofeng;Shen Xiaobo(Wuxi Hope Microelectronics Co.,Ltd.,Wuxi 214035,China;China Key System&Integrated Circuit Co.,Ltd.,Wuxi 214072,China)

机构地区：[1]无锡华普微电子有限公司,江苏无锡214035 [2]中科芯集成电路有限公司,江苏无锡214072

出　　处：《电子技术应用》2024年第2期107-110,共4页Application of Electronic Technique

摘　　要：为满足测试eMMC存储颗粒的长时间读写性能要求,研究了一种基于FPGA的eMMC寿命验证方法。结合eMMC工作原理和High Speed DDR(双倍率)总线模式,详细设计出验证系统的核心组成部分。硬件采用FPGA(xc7a50tfgg484-1)芯片作为主控器,4片eMMC(FEMDRW064G-88A19)芯片作为验证对象。解析eMMC初始化配置方法,设计开放式读写模块,配合eMMC监控软件控制指令,完成4片180 000次块区域的循环读写,测试结果全部通过,读写均速达到31 MB/s。In order to meet the requirements of testing the long-term read and write performance of eMMC storage particles,an eMMC life verification design method is studied based on FPGA.Combined with eMMC working principle and high speed DDR(double rate)bus mode,the core components of verification system are designed in detail.FPGA(xc7a50tffgg484-1)is adopted as main control chip and four pieces of eMMC(FEMDRW064G-88A19)are selected as verification objects.The initial configuration method of eMMC is analyzed,and the module of open read and write is designed.With the control commands of the eMMC monitoring software,180000 times of loop read and write based on the blocks is completed.All the test results are passed,and the average read/write speed can reach 31 MB/s.

关 键 词：eMMC 寿命验证 High Speed DDR总线 FPGA 

分 类 号：TN914[电子电信—通信与信息系统]