GPIO引脚模拟I^(2)C通信的驱动设计  

Driver design for simulating I^(2)C communication based on GPIO pins

作　　者：韩勇 张芬 魏进松 于涛 HAN Yong;ZHANG Fen;WEI Jinsong;YU Tao(PLA 63723 Troops,Xinzhou 036300,China)

机构地区：[1]中国人民解放军63723部队,忻州036300

出　　处：《集成电路与嵌入式系统》2024年第4期82-87,共6页INTEGRATED CIRCUITS AND EMBEDDED SYSTEMS

摘　　要：I^(2)C总线多用于嵌入式系统中多个芯片及模块间的数据通信,针对芯片的I^(2)C总线专用引脚被占用或I^(2)C总线功能需移植到其他平台等需求,现有的I^(2)C总线专用引脚使用方式存在一定的局限性。本文基于I^(2)C总线的通信机理开发了一套驱动程序,通过控制常规GPIO引脚电平模拟I^(2)C时序,实现I^(2)C总线通信功能。以STM32F103C8T6芯片为I^(2)C总线主控制器、PCF8591T A/D转换模块为I^(2)C总线从器件,对开发的I^(2)C驱动程序进行验证,试验结果表明,该驱动方式可靠、稳定。The I^(2)C bus is widely employed for exchanging data between multiple chips and modules in embedded systems.However,the utilization of dedicated I^(2)C bus pins has limitations when these pins are already occupied or when the I^(2)C bus function needs to be migrated to other platforms.In the study,a driver program is developed that leverages the communication mechanism of the I^(2)C bus.It achieves I^(2)C bus communication functionality by simulating I^(2)C timing through the control of electrical levels on conventional GPIO pins.The STM32F103C8T6 chip serves as the primary controller of the I^(2)C bus,while the PCF8591T A/D conversion module operates as the slave device.This article verifies the developed I 2C driver program,and the experimental results show that the driving method is reliable and stable.

关 键 词：I^(2)C总线 GPIO引脚 驱动 STM32 PCF8591T 

分 类 号：TP311.1[自动化与计算机技术—计算机软件与理论]