IGBT器件级物理模型的FPGA设计与实现及在环验证  

FPGA Design and Implementation of IGBT Device-Level Physical Model and Its in-the-Loop Verification

作　　者：张驾祥 谭会生[1] Zhang Jiaxiang;Tan Huisheng(College of Railway Transportation,Hunan University of Technology,Zhuzhou 412000,China)

机构地区：[1]湖南工业大学轨道交通学院,湖南株洲412000

出　　处：《半导体技术》2024年第4期330-340,共11页Semiconductor Technology

基　　金：湖南省教育厅科学研究重点项目(20A163);湖南省学位与研究生教学改革研究项目(2022JGYB183)。

摘　　要：基于硬件在环(HIL)仿真,研究了绝缘栅双极型晶体管(IGBT)器件级Hefner物理模型及其求解算法与优化方法,在现场可编程门阵列(FPGA)上设计并实现了Hefner优化模型,并基于PYNQ框架对其进行了在环验证。首先,分析并仿真了Hefner物理模型与其求解算法,提出并训练了一个前馈神经网络用以拟合模型中的一组非线性函数;接着,在FPGA上设计并验证了Hefner优化模型IP核,并使用基于PYNQ框架的FPGA在环验证方法对其进行了板级验证;最后,用IKW50N60H3和FGA25N120两种型号的IGBT器件对IP核进行了实例验证。结果表明,Hefner优化模型能准确地反映IGBT的开关瞬态特性;在Zynq 7020芯片的处理器系统(PS)端运行PYNQ框架,可编程逻辑(PL)端时钟频率为100 MHz时,实现60 000个时间步长的时间为212 s,是软件运行同样次数所用时间(341 s)的62%,FPGA加速明显。Based on the hardware-in-the-loop(HIL)simulation,the device-level Hefner physical model and its solving algorithm and optimization method of the insulated gate bipolar transistor(IGBT)were studied.The Hefner optimization model on field programmable gate array(FPGA)was designed and implemented,and the in-the-loop verification was performed based on PYNQ framework.Firstly,the Hefner physical model and its solving algorithm were analyzed and simulated.A feedforward neural net-work was proposed and trained to fit a set of nonlinear functions in the model.Then,the Hefner optimiza-tion model IP core was designed and verified on FPGA.The FPGA in-the-loop verification method based on PYNQ framework was used to verify the IP core at board level.Finally,two types of IGBTs,IKW50N60H3 and FGA25N120,were used to verify the IP core.The results show that the Hefner optimi-zation model can accurately reflect the switching transient characteristics of IGBT.When the PYNQ framework is running on the processor system(PS)port of Zynq 7020 chip and the clock frequency of the programmable logic(PL)port is 100 MHz,the time for 60000 time steps is 212 s,which is 62%of the time(341 s)for the software to run the same number of times,and the FPGA acceleration is obvious.

关 键 词：绝缘栅双极型晶体管(IGBT) Hefner物理模型 神经网络拟合 现场可编程门阵列(FPGA) 在环验证 

分 类 号：TN32[电子电信—物理电子学] TN791