NAND闪存可靠性验证实验平台设计与应用  

Design and application of a NAND flash reliability verification experimental platform

作　　者：王今雨 安健[1] 王龙翔[1] 唐新龙 丁跃 陈睿佳 WANG Jinyu;AN Jian;WANG Longxiang;TANG Xinlong;DING Yue;CHEN Ruijia(College of Computer,Xi’an Jiaotong University,Xi’an 710049,China;College of Computer,Xi’an University of Posts and Telecommunications,Xi’an 710061,China)

机构地区：[1]西安交通大学计算机科学与技术学院,陕西西安710049 [2]西安邮电大学计算机学院,陕西西安710061

出　　处：《实验技术与管理》2024年第2期186-192,共7页Experimental Technology and Management

基　　金：国家重点研发计划项目(2022YFB3305503);陕西省重点研发一般项目(2023-YBGY-403);河南省重点研发项目(201300210400HZ)。

摘　　要：为满足NAND闪存芯片性能和可靠性量化分析与测试的教学实验需求,自研NAND闪存可靠性验证实验设备,基于该设备构建了NAND闪存可靠性验证实验平台。平台支持软硬件构建过程测试和结果分析等相关实验内容,并通过实例测试验证了其实用性。平台可覆盖计算机类工科本科阶段多门专业课程的课内实验、专题实验、开放创新实验、课程设计以及毕业设计等,培养学生理论结合实践、独立思考、动手解决工程问题的能力。[Objective]Flash memory is a type of storage medium that does not lose data when power is dropped,which has the advantages of high integration and low power consumption.Because of its high read/write speed and low price,the NAND flash is suitable for storing large amounts of data and is applied in high-speed storage domains,compared with other flash memories.However,the NAND flash memory encounters data wear and erasure error problems during data reading and writing,which considerably shortens its lifetime.Furthermore,the tracking and analysis of the aforementioned problems is infeasible,and there are no experimental devices designed for undergraduate students to intuitively experience the change in NAND flash performance over time.[Methods]Thus,a NAND flash memory performance test platform,which analyzes the reliability and performance characteristics,is proposed in this study.Micron’s MLC 8 GB NAND flash memory chip is the experimental target,and the Nexys 3 FPGA development board is used to establish the memory test platform.The high density of I/O pins,which connect the FPGA board and the target flash memory chip,will complicate the connection process and affect the stability of high-speed data transmission.We designed a PCB subboard and used a VHDCI connector to ensure the stability of the FPGA board and data transmission of the NAND flash memory chip.In this study,we propose the supporting software for the platform,which can describe the topic design,control the experiment process,and analyze the experimental data.After analyzing the external pins,internal logic,and executing operation commands of the flash memory controller,serial communication,and top design,we modified the MLC chip mode to control the flash memory chip on the FPGA.This study also describes in detail the transmission of the commands to be executed on the FPGA and analyzes the received data to extract the features of the target MLC chip,such as the read/write latency,data loss rate,and erase delay.[Results]The experimental results show t

关 键 词：实验设备 闪存可靠性 数字电路设计 FPGA 

分 类 号：TN406[电子电信—微电子学与固体电子学] TP333[自动化与计算机技术—计算机系统结构]