基于X64架构的泛探雷达并行处理系统设计  

Design of Parallel Processing System for Pan-detector Radar Based on X64 Architecture

作　　者：叶祥龙 蒋文 李云莉 唐先慧 陆炫宇 YE Xianglong;JIANG Weng;LI Yunli;TANG Xianghui;LU Xuanyu(Sichuan Jiuzhou Electric Group Co.Ltd,Chengdu 610096)

机构地区：[1]四川九洲电器集团有限责任公司,成都610096

出　　处：《火控雷达技术》2024年第1期27-34,41,共9页Fire Control Radar Technology

基　　金：武器装备预研基金(61404130111)。

摘　　要：针对“低慢小”目标探测的泛探雷达仿真系统存在运行时间长运算效率低的问题,本文提出了一种双层并行处理技术,每一层都在存储上使用了双缓冲模型,在时序上使用“生产者-消费者”模型。该技术以增加一倍内存开销为代价换取了时间上“生产”和“消费”的同步执行,从而降低系统运行时间。经过仿真验证以及对比,该技术相比传统串行处理技术,系统运行时间降低了73%。Addressing the problem of long running time and low operation efficiency of the simulation system of the Pan-detector detection radar based on“low slow and small”target detection.A double-layer parallel processing technique was proposed,each layer used a dual buffering model on storage,and a“producer-consumer”model on timing.This technology traded the synchronous execution of“production”and“consumption”in time at the cost of doubling the memory cost,thus reducing the system running time.After simulation and comparison,the system running time of this technology was reduced by 73%compared with the traditional serial processing technology.

关 键 词：低慢小 双层并行处理技术 双缓存 生产者-消费者 

分 类 号：TN95[电子电信—信号与信息处理] TP319.9[电子电信—信息与通信工程]