雷达对抗中基于FPGA输入分块重映射的数据处理方法  

Data Processing Method based on FPGA Input Block Remapping in Radar Countermeasures

作　　者：薛晓琴 孟刚[1,2] 陈旸 李宏博[3] 赵健[3] XUE Xiaoqin;MENG Gang;CHEN Yang;LI Hongbo;ZHAO Jian(Beijing Institute of Space Long March Vehicle,Beijing,100076;National Key Laboratory of Science and Technology on Test Physics and Numerical Mathematics,Beijing,100076;Harbin Institute of Technology,Harbin,150006)

机构地区：[1]北京航天长征飞行器研究所,北京100076 [2]试验物理与计算数学国家重点实验室,北京100076 [3]哈尔滨工业大学,哈尔滨150006

出　　处：《导弹与航天运载技术（中英文）》2024年第2期86-90,106,共6页Missiles and Space Vehicles

摘　　要：雷达对抗中,干扰机侦收雷达的信号,经AD采样后输入FPGA进行处理并产生干扰信号。FPGA平台利用Xilinx等官方提供的FFTIP核对高速ADC输出的数据进行FFT处理时,需要进行“并行-串行”的数据预处理,降低了处理速度,同时也没有对FPGA内部资源进行最大化利用。基于以上问题,提出一种基于FPGA输入分块重映射的数据处理方法。该方法通过数据输入重映射模块将输入雷达数据优化为并行分块的数据流格式,再通过FFT蝶形网络输出离散傅里叶变换数据,最后进行并行结果输出。试验证明,本方法能有效节省FPGA的运算时间,提高雷达数据处理速度,优化利用了FPGA内部资源,具有实时性好、灵活性高的特点。In radar countermeasures,the jammer detects the radar signal,then the signal is sampled by AD and input to FPGA for processing and generating interference signal.When using the FFT IP core officially provided by the FPGA platform Xilinx to perform FFT processing on the data output by the high-speed ADC,data preprocessing of"parallel-serial"is required,which greatly slows down the FFT processing speed.At the same time,the internal resources of FPGA is not maximized.An data processing method based on FPGA input block remapping is proposed.This method uses the data input remapping module to optimize the input data into a parallel block data stream format.Then the FFT butterfly networks process the input data into blocks to obtain the discrete Fourier transform data.Finally,parallel data are output.Experimental results show that this method can effectively save FPGA computing time,improve radar data processing speed,optimize the utilization of FPGA internal resources,and has the characteristics of good real-time performance and high flexibility.

关 键 词：雷达对抗 FPGA 分块重映射 数据处理 蝶形网络 

分 类 号：V44[航空宇航科学与技术—飞行器设计]