基于FPGA的多总线可动态重构监测系统  

Multi-bus Dynamic Reconfiguration Monitoring System Based on FPGA

作　　者：全贺 王红亮[1] 厉智强 王浩[1] 王学斌 QUAN He;WANG Hongliang;LI Zhiqiang;WANG Hao;WANG Xuebin(North University of China,State Key Laboratory of Dynamic Measurement Technology;Beijing Aerospace System Engineering Research Institute)

机构地区：[1]中北大学,省部共建动态测试技术国家重点实验室 [2]北京宇航系统工程研究所

出　　处：《仪表技术与传感器》2024年第3期66-70,共5页Instrument Technique and Sensor

基　　金：山西省“1331工程”重点学科建设计划项目(1331KSC)。

摘　　要：针对传统多总线数据监测系统中存在的数据传输实时性不高、系统硬件占用资源多、系统可维修性低等问题,设计了以FPGA为核心,以多路RS422、RS232、1553B总线作为通讯接口,以信息识别、信息提取、数据融合、多总线动态重构、双冗余传输为主要功能模块,以信道速率动态调节的RS422为数据传输路径,采用双冗余传输方式,依据FPGA标准化设计思路,提出了基于FPGA多总线动态重构监测系统设计方案。实验测试结果表明:在20、60、-40℃环境温度下,多总线动态重构时间均小于1 s,数据传输误码率远低于0.02%,系统工作稳定,满足设计需求。The traditional multi-bus data monitoring system has some problems,such as low real-time data transmission,high resource consumption and low maintainability.With FPGA as the core,multi-channel RS422,RS232,1553B bus was designed as the communication interface,information recognition,information extraction,data fusion,multi-bus dynamic reconstruction,double redundancy transmission as the main function module,RS422 with dynamic channel rate regulation as the data transmission path,using double redundancy transmission mode.According to the FPGA standardization design idea,the design scheme of multi-bus dynamic reconfiguration monitoring system based on FPGA was proposed.Experimental test results show that the multi-bus dynamic reconstruction time is less than 1 s at 20℃,60℃ and-40℃,and the bit error rate of data transmission is much lower than 0.02%.The system works stably and meets the design requirements.

关 键 词：FPGA 多总线 动态重构 数据融合 双冗余 

分 类 号：TP273[自动化与计算机技术—检测技术与自动化装置]