具有低EMI和低开启损耗的浮空P区IGBT研究  

Study on a Floating P-Base IGBT with Low EMI and Turn-On Losses

作　　者：肖蝶 冯全源[1] 李嘉楠 XIAO Die;FENG Quanyuan;LI Jianan(Institute of Microelectronics,Southwest Jiaotong University,Chengdu 611756,P.R.China)

机构地区：[1]西南交通大学微电子研究所,成都611756

出　　处：《微电子学》2024年第1期116-121,共6页Microelectronics

基　　金：国家自然科学基金资助项目(62090012);四川省重点研发项目(2023YFG0004)。

摘　　要：为了优化浮空P区IGBT结构的电磁干扰噪声(EMI)与开启损耗(E_(on))的折中关系,提出一种假栅沟槽连接多晶硅阻挡层的浮空P区IGBT结构。新结构在浮空P区内引入对称的两个假栅沟槽,并通过多晶硅层连接。假栅沟槽将浮空P区分为三部分,减少了栅极沟槽附近的空穴积累,降低了栅极的固有位移电流。二维结构仿真表明,在小电流开启时,该结构与传统结构相比,栅极沟槽空穴电流密度减小90%,明显降低了集电极电流(I_(CE))过冲峰值和栅极电压(V_(GE))过冲峰值,提高了栅极电阻对dI_(CE)/dt和dV_(KA)/dt的控制能力。在相同的开启损耗下,新结构的dI_(CE)/dt、dV_(CE)/dt和dV_(KA)/dt最大值分别降低32.22%、38.41%和12.92%,降低了器件的EMI噪声,并改善了器件EMI噪声与开启损耗的折中关系。To optimize the trade-off relationship between EMI and E_(on)for the floating P-base IGBT structure,a floating P-base IGBT structure with a dummy gate trench connected to a poly barrier layer was proposed.Two symmetrical dummy gate trenches were introduced in the floating P-base of the new structure,which were connected to each other by polysilicon.The dummy gate trenches divided the floating P-base into three parts,which decreased the number of holes accumulated near the gate trench and the inherent gate displacement current.The simulation results of the two-dimensional structure show that,compared with conventional IGBT,the proposed structure's hole current density near the gate trench is reduces by 90%at low turn-on current.This reduction significantly reduces the peak values of collector current overshoot(I_(CE))and gate voltage overshoot(V_(GE)),thereby improving the control capability of the gate resistance at dI_(CE)/dt and dV_(KA)/dt.For the same turn-on loss,the maximum values of dI_(CE)/dt,dV_(CE)/dt and dV_(KA)/dt in the new structure are reduced by 32.22%,38.41%and 12.92%respectively,thus reducing EMI noise and improving the trade-off between EMI noise and turn-on loss of the device.

关 键 词：浮空P区 电磁干扰噪声 开启损耗 小电流 固有位移电流 

分 类 号：TN342[电子电信—物理电子学]