一种满摆幅输入的高精度∑-Δ调制器设计  

Design of a High PrecisionΣ-ΔModulator with Full Amplitude Input

作　　者：崔子豪 郭兴龙[1] 朱友华[1] 张洋 吴庆晴 杜彦航 CUI Zihao;GUO Xinglong;ZHU Youhua;ZHANG Yang;WU Qingqing;DU Yanhang(School of Information Science and Technology,Nantong University,Nantong 226019,China)

机构地区：[1]南通大学信息科学技术学院,江苏南通226019

出　　处：《电讯技术》2024年第5期798-804,共7页Telecommunication Engineering

基　　金：国家自然科学基金资助项目(62074086)。

摘　　要：针对高精度Σ-Δ调制器因采用高阶或者级联结构而存在满摆幅输入条件下积分器容易过载以及电路复杂度较高的问题,利用Matlab设计了一种满摆幅输入的高精度Σ-Δ调制器。采用描述调制器时域模型的方法,使用代码自动综合出满足要求的调制器系数。该调制器电路采用Tower Jazz 0.18μm CMOS工艺进行设计与仿真,结果表明,带宽内的信噪失真比达到105.5 dB,有效位数为17.2位,版图面积为0.4 mm^(2),在5 V电源电压下功耗为1.2 mW。该调制器可用于对任意输入信号幅度的低频微弱信号进行精确检测的传感器信号采集电路中。High precisionΣ-Δmodulators adopt high-order or cascade structures,which leads to high complexity problems and easy overload of the integrator under full amplitude input.For above problems,aΣ-Δmodulator with full amplitude is designed using Matlab.By describing the time domain model of the modulator,the modulator coefficients that meet the requirements are automatically synthesized by code.The modulator circuit is designed and simulated using Tower Jazz 0.18μm CMOS process.The results show that the modulator achieves a signal-to-noise-and-distortion ratio(SNDR)of 105.5 dB within the bandwidth,and an effective number of bits(ENOB)of 17.2.The layout area is 0.4 mm 2,and the power consumption is 1.2 mW at 5 V supply voltage.This modulator can be used in the signal acquisition circuit of the sensor to accurately detect the low frequency weak signal of any amplitude of the input signal.

关 键 词：Σ-Δ调制器 满摆幅 斩波稳定技术 

分 类 号：TN432[电子电信—微电子学与固体电子学]