面向商业航天卫星成本效益的三模冗余软错误防护技术:近似计算的实践  

Cost-Effective TMR Soft Error Tolerance Technique for Commercial Aerospace:Utilization of Approximate Computing

作　　者：李炎[1] 胡岳鸣 曾晓洋[1] LI Yan;HU Yueming;ZENG Xiaoyang(Fudan University State Key Laboratory of Integrated Chips and Systems,Shanghai 201203,China)

机构地区：[1]复旦大学集成芯片与系统全国重点实验室,上海201203

出　　处：《电子与信息学报》2024年第5期1604-1612,共9页Journal of Electronics & Information Technology

基　　金：国家自然科学基金(62204045);上海市浦江人才计划(22PJD005)。

摘　　要：三模冗余(TMR)作为如今集成电路可靠性领域中最为常用且有效的软错误加固技术,在满足高容错要求之时,不可避免地牺牲了庞大的硬件损耗。为实现面积、功耗等硬件性能和容错电路加固能力的折中考虑,适应低成本高可靠性加固的时代需求,针对基于近似计算的三模冗余加固技术(ATMR)进行研究,该文提出一种基于近似门单元(ApxLib)的动态调整多目标优化框架(ApxLib+DAMOO)。首先,其基本优化框架采用非支配排序遗传算法(NSGA-Ⅱ)实现,通过极性分析与预创建的近似库对电路实现快速近似。随后,该框架提出动态概率调整和极性扩张两种创新机制,根据可测性分析对遗传算法中门单元的突变概率进行动态更新,对双向门单元进行定向识别和重构,以实现寻优效率和寻优效果的双重优化。实验结果表明,该文提出的优化框架与传统NSGA-Ⅱ相比,在相同硬件损耗下可实现最大10%~20%的额外软错误率(SER)降低,且其执行时间平均降低18.7%。Triple Modular Redundancy(TMR),as the most prevalent and effective technique for soft error mitigation technique,inevitably incurs substantial hardware overhead while meeting high fault-tolerance requirements.To achieve the trade-off between area,power and fault coverage and meet the requirement of low-cost and high-reliability circuit design,Approximate Triple Modular Redundancy(ATMR)is investigated and a Dynamic Adjustment Multi-Objective Optimization Framework based on Approximate Gate Library(ApxLib+DAMOO)is investigated.The basic optimization framework employs Non-dominated Sorting Genetic Algorithm II(NSGA-II),achieving rapidly approximation through parity analysis and the pre-established ApxLib.Subsequently,the framework introduces two novel mechanisms:dynamic probability adjustment and parity expansion.The first mechanism dynamically updates the mutation probability of gates in the genetic algorithm based on testability analysis,while the second mechanism performs recognition and reconstruction for binate gates to achieve dual optimization of efficiency and effectiveness in optimization.Experimental results indicate that the proposed optimization framework achieves an additional Soft Error Rate(SER)reduction of up to 10%~20%compared to traditional NSGA-II with the same hardware overhead,while reducing 18.7%of execution time reduction averagely.

关 键 词：容软错误加固 三模冗余 近似计算 多目标优化 

分 类 号：TN492[电子电信—微电子学与固体电子学]