基于NEON并行计算架构的矩阵乘法加速技术  

Matrix Multiplication Acceleration Based on NEON Parallel Computing Architecture

作　　者：祁俊雄 程岳 刘作龙 韩伟 潘妍 李晨卉 QI Jun-xiong;CHENG Yue;LIU Zuo-long;HAN Wei;PAN Yan;LI Chen-hui(Xi′an Aeronautics Computing Technique Research Institute,AVIC,Xi′an 710000,China)

机构地区：[1]航空工业西安航空计算技术研究所,陕西西安710000

出　　处：《航空计算技术》2024年第3期48-52,共5页Aeronautical Computing Technique

基　　金：航空科学基金项目资助(2022Z071031001)。

摘　　要：当今计算机的信号处理需求与日俱增。随着ARM体系结构的迅速发展,基于ARM架构的国产处理器迅速崛起,研究针对ARM平台的通用信号处理加速技术具有重要意义。通过分析ARMv8架构以及NEON并行计算技术,以FT-2000/4(ARMv8架构)为实验平台,研究典型DSP函数库在ARMv8架构上的优化加速。以矩阵运算为例,提出了基于NEON的通用矩阵乘法算法。实验结果表明所提算法在ARM架构上有显著的加速效果。为搭建针对ARM架构的全面且高效的通用信号处理库提供了技术支持。The demands for signal processing on computers are constantly increasing.With the rapid development of ARM architecture and the rapid rise of domestic processors based on ARM architecture,it is of great significance to investigate the general signal processing acceleration technology for the ARM platform.By analyzing the ARMv8 architecture and NEON technology,the FT-2000/4(ARMv8 architecture)is adopted as an experimental platform to examine the acceleration of the representative DSP library on the ARMv8 architecture.The matrix operation is taken as an example,in which a NEON-based general matrix multiplication algorithm is proposed.Experimental results show that the acceleration of the proposed algorithm for the ARM architecture is significant.It can provide technical support for building a comprehensive and efficient general signal processing library for the ARM architecture.

关 键 词：通用信号处理 ARMv8 FT-2000/4 NEON 矩阵乘法 

分 类 号：V247.1[航空宇航科学与技术—飞行器设计]