基于OpenLane的专用集成电路设计工具  

Research on ASIC design tool based on OpenLane

作　　者：王建新 许弘可 郑玉崝 肖超恩 张磊 陈欣 WANG Jianxin;XU Hongke;ZHENG Yuzheng;XIAO Chaoen;ZHANG Lei;CHEN Xin(Department of Electronics and Communications Engineering,Beijing Electronic Science and Technology Institute,Beijing 100070,China)

机构地区：[1]北京电子科技学院电子与通信工程系,北京100070

出　　处：《福州大学学报（自然科学版）》2024年第3期261-267,共7页Journal of Fuzhou University(Natural Science Edition)

基　　金：教育部新工科研究与实践资助项目(E-AQGABQ20202704)。

摘　　要：提出一种基于OpenLane的专用集成电路(ASIC)设计工具的设计方案.以Gambas开发环境为基础,利用插件技术实现对OpenLane工具链的集成,完成基于OpenLane的ASIC设计工具,即EasyASIC.该工具涵盖工程管理、代码编辑、Verilog代码的编译、仿真、OpenLane初始化文件的配置、GDSII文件的生成、GDS2D和GDS3D显示等功能,从而实现ASIC设计的自动化.以32 bit有符号乘法器为例,对该工具进行功能验证测试.实验结果表明,EasyASIC能够在国产Deepin操作系统下流畅运行,实现32 bit有符号乘法器从寄存器传输级文件描述向GDSII文件的转换,该工具有很强的操作性和易用性,对于提升我国集成电路设计工具软件产业水平具有一定的参考意义.This paper firstly proposed a design scheme of application specific integrated circuit(ASIC)design tools based on OpenLane.Secondly,based on Gambas development environment,plug-in technology was used to integrate OpenLane toolchain,and completed OpenLane-based ASIC design tool,namely EasyASIC.The tool covers engineering management,code editing,Verilog code compilation,simulation,OpenLane initialization file configuration,GDSII file generation,GDS2D and GDS3D display to achieve ASIC design automation.Finally,taking the 32 bit signed multiplier as an example,the function verification test of this tool was carried out.The experimental results show that EasyASIC can run smoothly in the domestic Deepin operating system,and realize the transformation of 32 bit signed multiplier from register transfer level file description to GDSII file.The tool has strong operability and ease of use,and has certain reference significance for improving the development of Chinese integrated circuit design tool software industry.

关 键 词：集成电路设计工具 专用集成电路 OpenLane Gambas 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]