基于FPGA的便携心电智能诊断加速器及优化选芯方案  

FPGA-based portable ECG smart diagnostic gas pedal and optimized core selection scheme

作　　者：郭千禧 刘文涵 罗德宇 黄启俊[1] Guo Qianxi;Liu Wenhan;Luo Deyu;Huang Qijun(Department of Physical Science and Technology,Wuhan University,Wuhan 430072,China)

机构地区：[1]武汉大学物理科学与技术学院,湖北武汉430072

出　　处：《电子技术应用》2024年第6期89-95,共7页Application of Electronic Technique

基　　金：国家自然科学基金(81971702)。

摘　　要：心电图(electrocardiogram,ECG)是诊断与心脏相关疾病的关键工具,可穿戴心电监护仪Holter是院外检测的重要手段,小型化、便携性、实时检测是优化方向。人工智能技术应用于包括心电诊断的各个领域,但存在参数量大、难于小型化、计算速度慢的问题,不满足便携心电监护仪的要求,而可编程逻辑门器件(Field-Programmable Gate Array,FPGA)有并行加速的特性。在AI智能算法硬件化的工程应用上,存在成本、速度、资源利用率的权衡,需要进行科学的芯片选型。开发了一种基于1D-CNN的、用于心电诊断的BeatNet,对于4分类的检测任务,该模型具有98.5%的分类准确率。在FPGA上实现BeatNet硬件化的实验,经测试在Altera公司的DE1-SoC开发板上部署RTL级硬件网络电路,最高频率为69 MHz,单个心拍诊断需要221个周期,总计算时间为3.31μs,满足实时标准。针对速度、功耗和成本指标评估了不同部署策略的性能,开发了一个选芯综合指数,可以在仅损失0.2%精度、5μs内完成单心拍的条件下,将FPGA计算芯片成本控制在200美元以内,满足高速度、低成本、低功耗的要求,对工程优化有实用价值。Electrocardiogram(ECG)is a key tool for diagnosing heart-related diseases.The wearable ECG monitor Holter is an important means of out-of-hospital detection.Miniaturization,portability,and real-time detection are the optimization directions.Artificial intelligence technology is used in various fields including electrocardiogram diagnosis,but there are problems such as large number of parameters,difficulty in miniaturization,and slow calculation speed.It does not meet the requirements of portable electrocardiogram monitors,and programmable logic gate devices(Field-Programmable Gate Array,FPGA)has parallel acceleration characteristics.This article developed a BeatNet based on 1D-CNN for ECG diagnosis.For the 4-class detection task,the model has a classification accuracy of 98.5%.The experiment of implementing BeatNet hardware on FPGA was tested by deploying an RTL-level hardware network circuit on Altera's DE1-SoC development board.The maximum frequency is 69 MHz.A single heartbeat diagnosis requires 221 cycles,and the total calculation time is 3.31 microseconds.Meet real-time standards.The performance of different deployment strategies is evaluated against speed,power consumption and cost indicators.This paper develops a core selection comprehensive index that can control the cost of FPGA computing chips with only a loss of 0.2%accuracy and a single heartbeat completed within 5 microseconds.Within 200 US dollars,it meets the requirements of high speed,low cost and low power consumption,and has practical value for engineering optimization.

关 键 词：心电检测 深度学习 FPGA RTL级 便携医疗设备 

分 类 号：TN911.72[电子电信—通信与信息系统]