一种采用分段电容DEM方法的噪声整形SARADC  

A Noise-Shaping SAR ADC with Segmented Capacitor Array Dynamic Element Matching Method

作　　者：张云博 国长宇 钟国强 申人升[1] ZHANG Yunbo;GUO Changyu;ZHONG Guoqiang;SHEN Rensheng(School of Integrated Circuits,Dalian University of Technology,Dalian 116620,China)

机构地区：[1]大连理工大学集成电路学院,大连116620

出　　处：《微处理机》2024年第3期1-4,共4页Microprocessors

基　　金：2022年工业与信息化部产业基础再造和制造业高质量发展专项(TC220A04A-49);国家重点研发计划项目“高能效感算一体芯片与系统”(2023YFB4503003)。

摘　　要：针对传统动态元件匹配(DEM)方法所需硬件资源较多的问题,设计一种二阶误差反馈噪声整形SAR ADC。该设计采用分段电容以减小DAC阵列规模及误差反馈环路电容的容值,缩减整体电路的面积。在此基础上形成一种应用于分段电容阵列的DEM方法,以较小的电路复杂度为代价,减轻电容失配对信噪失真比(SNDR)等性能参数的影响。仿真结果表明,在0.3%的电容失配下,所设计的噪声整形SAR ADC采用8位电容阵列即可实现70.9dB的SNDR,所需面积仅为0.019mm^(2)。Aiming at the problem that the traditional dynamic element matching(DEM)method needs more hardware resources,a second-order error feedback noise-shaping SAR ADC is designed.The design uses segmented capacitors to reduce the size of DAC array and the capacitance of error feedback loop,and reduce the area of the whole circuit.On this basis,a DEM method applied to segmented capacitor array is formed,which reduces the influence of capacitor mismatch on performance parameters such as signal-to-noise-distortion ratio(SNDR)at the cost of fewer additional circuit components.The simulation results show that the designed noise-shaping SAR ADC can achieve 70.9 dB SNDR with an 8-bit capacitor array with a capacitance mismatch of 0.3%,and the required area is only 0.019 mm^(2).

关 键 词：分段电容阵列 动态元件匹配 噪声整形 

分 类 号：TN432[电子电信—微电子学与固体电子学]