一种应用于反熔丝FPGA的快速启动电荷泵设计  

Design of a Fast Start Charge Pump for Antifuse FPGA

作　　者：代志双 赵桂林[1] 曹振吉 DAI Zhishuang;ZHAO Guilin;CAO Zhenji(The 58th Institute of China Electronics Technology Group Corporation,Wuxi 214035,China)

机构地区：[1]中国电子科技集团公司第五十八研究所,无锡214035

出　　处：《微处理机》2024年第3期5-8,共4页Microprocessors

摘　　要：针对传统Dickson结构电荷泵升压较慢,在用户模式下降低反熔丝FPGA工作速度,以及造成电路工作时序混乱的问题,在传统结构的基础上设计一种快速启动的电荷泵电路。该电路在常见的振荡器、非交叠时钟产生电路、主体电荷泵电路之外增设时钟信号增强电路以及0V产生电路。以时钟信号增强电路,加快电荷的转移速率,实现电荷泵快速升压;0V产生电路实现高压模块与低压模块的有效隔离,在编程模式下起到电路保护作用。基于CMOS工艺,在全局等效负载条件下进行仿真实验,结果表明改进后的电荷泵输出达到稳定的时间比原电路缩短了57.6%。实际流片后,电路功能测试正常。Traditional Dickson structure charge pumps suffer from slow rise times,which can hinder the performance of antifuse FPGAs in user mode and lead to timing issues.To address these limitations,a rapid-boot charge pump circuit is proposed,building upon the traditional Dickson structure.The enhanced design incorporates a clock signal enhancement circuit and a 0 V generation circuit alongside the standard oscillator,non-overlapping clock generation circuit,and main charge pump circuit.The clock signal en-hancement circuit expedites charge transfer,enabling rapid charge pump boost.The 0 V generation circuit effectively isolates the high-voltage module from the low-voltage module,providing circuit protection during programming mode.Simulation experiments conducted under global equivalent load conditions,based on CMOS technology,demonstrate that the improved charge pump achieves a stable output 57.6%faster than the original design.Actual chip fabrication and circuit function testing confirm the successful implementation of the proposed design.

关 键 词：电荷泵 时钟信号增强电路 反熔丝FPGA 快速启动 

分 类 号：TN402[电子电信—微电子学与固体电子学]