基于AHB的多模式xSPI控制器设计  

Design of Multi-Mode xSPI Controller Based on AHB

作　　者：钱俊杰 桑春洋 华国环[1] Qian Junjie;Sang Chunyang;Hua Guohuan(School of Electronics&Information Engineering,Nanjing University of Information Science&Technology,Nanjing 210044,China)

机构地区：[1]南京信息工程大学电子与信息工程学院,南京210044

出　　处：《半导体技术》2024年第7期629-634,共6页Semiconductor Technology

基　　金：国家重点研发计划(2022YFB4401301)。

摘　　要：为了提高嵌入式处理器访问外部设备的速率,满足不同场景下的应用需求,设计了一种基于先进高性能总线(AHB)的多模式高速扩展串行外部设备接口(xSPI)控制器。该控制器支持最多八线的接口传输宽度及双边沿触发的传输方式,允许在间接访问模式、状态轮询模式及内存映射模式下传输数据,并提供传输宽度和传输阶段控制。基于功能案例以及SMIC 55 nm工艺下的逻辑综合和现场可编程门阵列(FPGA)验证对该控制器进行功能和性能测试。结果表明,该控制器可以通过用户配置来调整传输宽度和边沿触发方式,在多种工作模式下对外部数据进行读/写。此外,其还可以实现可编程的中断触发、时钟延展、直接存储器访问(DMA)传输请求等,且性能良好,最大时钟频率为200 MHz。In order to improve the access rate of the embedded processor to external devices and meet the application requirements in different scenarios,a multi-mode high-speed eXpanded Serial Peripheral Interface(xSPI)controller based on advanced high performance bus(AHB)wasdesigned.The controller supports up to eight lines of interface transmission width and double-edge-triggered trans-mission mode,allows data transmission in indirect access mode,state polling mode and memory mapping mode,and provides transmission width and transmission phase control.Based on the functional case and the logic synthesis and field programmable gate array(FPGA)verification under SMIC 55 nm process,the function and performance of the controller were tested.The results show that the controller can adjust the transmission width and edge trigger mode through user configuration to read/write external data in various working modes.Besides,it can also realize programmable interrupt triggering,clock extension,direct memory access(DMA)transmission request,etc.,and has good performances with a maximum clock frequency of 200 MHz.

关 键 词：先进高性能总线(AHB) 高速扩展串行外部设备接口(xSPI)控制器 间接访问传输 状态轮询传输 内存映射传输 

分 类 号：TP336[自动化与计算机技术—计算机系统结构]