A 256 Gb/s electronic−photonic monolithically integrated transceiver in 45 nm CMOS  被引量:1

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作  者:Ang Li Qianli Ma Yujun Xie Yongliang Xiong Yingjie Ma Han Liu Ye Jin Menghan Yang Guike Li Haoran Yin Minye Zhu Yang Qu Peng Wang Daofa Wang Wei Li Liyuan Liu Nan Qi Ming Li 

机构地区:[1]Key Laboratory of Optoelectronic Materials and Devices,Institute of Semiconductors,Chinese Academy of Sciences,Beijing 100083,China [2]Institute of Semiconductors,Chinese Academy of Sciences,Beijing 100083,China [3]Center of Materials Science and Optoelectronics Engineering,University of Chinese Academy of Sciences,Beijing 100190,China [4]School of Electronic,Electrical and Communication Engineering,University of Chinese Academy of Sciences,Beijing 100049,China

出  处:《Journal of Semiconductors》2024年第7期7-10,共4页半导体学报(英文版)

基  金:This work was supported by the National Natural Science Foundation of China(Grant Nos.61925505,92373209 and 62235017).

摘  要:With the explosive development of artificial intelligence(AI),machine learning(ML),and high-performance comput-ing(HPC),the ever-growing data movement is asking for high density interconnects with higher bandwidth(BW),lower power and lower latency[1−3].The optical I/O leverages silicon photonic(SiPh)technology to enable high-density large-scale integrated photonics.

关 键 词:Gb/s TRANSCEIVER MONOLITHIC 

分 类 号:TN491[电子电信—微电子学与固体电子学]

 

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