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作 者:王文凯 姚金杰[1] 白建胜 李龙 高旭文 王晨阳 WANG Wenkai;YAO Jinjie;BAI Jiansheng;LI Long;GAO Xuwen;WANG Chenyang(Shanxi Provincial Key Laboratory of Information Detection and Processing,North University of China,Taiyuan 030051,China)
机构地区:[1]中北大学信息探测与处理山西省重点实验室,山西太原030051
出 处:《测试技术学报》2024年第4期407-412,共6页Journal of Test and Measurement Technology
基 金:山西省基础研究计划资助项目(202203021212157);国防基础研究计划资助项目(JCKY2021210B073,JCKY2022209A001)。
摘 要:在宽带电磁接收机领域,高频段频率源通常存在输出功率低、相位噪声性能差的问题,因此,频率源性能显得尤为重要。针对这一问题,本文利用锁相环与倍频的设计方式,设计一种小型化K波段的频率源。首先,对锁相环电路,控制单元电路和稳压电源电路进行设计;然后,对频率源进行建模仿真验证其可行性,通过采用腔体设计及微组装的方式完成了锁相环电路、控制单元、稳压电源电路及倍频器的设计;最后,对频率源进行了测试。测试结果表明,该频率源输出频率为25.6 GHz,输出功率大于10 dBm,其归一化相位噪声为-76 dBc/Hz@100 kHz,其整体尺寸为60 mm×40 mm×8 mm。所设计的频率源具有体积小型化、各项性能优良且能长期稳定工作的优势,能够满足宽带接收机工程需求应用。In the field of broadband electromagnetic receivers,high-frequency frequency sources usually have problems such as low output power and poor phase noise performance,so frequency source perfor⁃mance is particularly important.To address this problem,this paper uses phase-locked loop and frequency multiplication design methods to design a miniaturized K-band frequency source.First,the phase-locked loop circuit,control unit circuit and voltage-stabilized power supply circuit are designed,and then the fre⁃quency source is modeled and simulated to verify its feasibility.The phase-locked loop circuit and control unit are completed by using cavity design and micro-assembly,the design of the voltage-stabilized power supply circuit and the frequency multiplier,and finally the frequency source was tested.The test results show that the output frequency of this frequency source is 25.6 GHz,the output power is greater than 10 dBm,its normalized phase noise is−76 dBc/Hz@100 kHz,and its overall size is 60 mm×40 mm×8 mm.The designed frequency source has the advantages of small size,excellent performance and longterm stable operation,and it can meet the application requirements of broadband receiver engineering.
分 类 号:TN74[电子电信—电路与系统]
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