机构地区:[1]Hangzhou Institute of Technology,Xidian University,Hangzhou 311200,China [2]State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology,School of Microelectronics,Xidian University,Xi'an 710071,China [3]School of Artificial Intelligence,Xidian University,Xi'an 710071,China [4]School of Materials Science and Engineering,University of New South Wales UNSWSydney,Sydney NSW 2052,Australia [5]ARC Centre of Excellence in Future Low-Energy Electronics Technologies FLEET,University of New South Wales UNSWSydney,Sydney NSW 2052,Australia [6]Key Laboratory of Light Field Manipulation and Information Acquisition,Ministry of Industry andInformation Technology,and Shaanxi Key Laboratory of Optical Information Technology,School of Physical Science and Technology,Northwestern Polytechnical University,Xi'an 710129,China [7]Faculty of Electrical Engineering and Computer Science,Ningbo University,Ningbo 315211,China
出 处:《Science China(Information Sciences)》2024年第6期194-202,共9页中国科学(信息科学)(英文版)
基 金:supported by National Key R&D Program of China(Grant No.2023YFB4402303);National Natural Science Foundation of China(Grant Nos.62090033,62025402,62274128,92264202,62293522,92364204);Zhejiang Provincial Natural Science Foundation of China(Grant Nos.LDT23F04023F04,LDT23F04024F04,LR21F010003);Fundamental Research Funds for the Central Universities(Grant No.QTZX23079);Key Research and Development Program of Ningbo City(Grant No.2023Z071)。
摘 要:Driven by the explosive development of data-centric computation applications,it is becoming urgent to develop in-memory computing devices that are beyond the von Neumann architecture with an arrangement of separated logic and memory components.The transistor-type solid-state non-volatile memories,such as ferroelectric field-effect transistors(Fe FETs),have long been regarded as a competitive candidate for future in-memory computing architectures.However,the density scaling towards high-density arrays would require advanced Fe FETs with reduced footprints,which remains a great challenge so far.Here,a vertical-transport(VT)Fe FET that flips the charge transport channel perpendicular to the substrate plane is proposed,in which a ferroelectric gate and a van der Waals(vd W)heterojunction channel are vertically integrated,effectively reducing the device footprints.The proposed VT-Fe FET shows not only the robust binary non-volatile memory states but also several key synaptic functionalities at the device level.An artificial neural network with supervised learning was simulated based on the device conductance switching properties,showing excellent classification accuracy for the MNIST handwritten digits.These findings suggest that the proposed VT-Fe FET could offer a new solution for future non-volatile memories as well as more advanced neuromorphic systems.
关 键 词:vdW heterostructure non-volatile memory vertical-transport transistor ferroelectric field-effect transistor memristive devices
分 类 号:TN386[电子电信—物理电子学] TP333[自动化与计算机技术—计算机系统结构]
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