塑封模拟IC器件的可靠性提升方法  

Reliability Improvement Method of Plastic Packaging Analog IC Devices

作　　者：曹华东 罗璞[2] 江山 左存果 肖丽 CAO Huadong;LUO Pu;JIANG Shan;ZUO Cunguo;XIAO Li(Chongqing Giga Chip Technology Co.,Ltd.,Chongqing 401300,China;The 24th Research Institute of CETC,Chongqing 400060,China)

机构地区：[1]重庆吉芯科技有限公司,重庆401300 [2]中国电子科技集团公司第二十四研究所,重庆400060

出　　处：《电子工艺技术》2024年第4期33-37,共5页Electronics Process Technology

摘　　要：以某型塑封类模拟集成电路(IC)的分层失效为例,旨在探讨塑封器件分层与搪锡条件、导电胶耐热性能、上板回流条件、框架镀层材料以及装在板上后的应力状态之间的关系。采用超声扫描、电镜扫描、热重分析等表征方法,结合仿真模型,对该器件抗分层能力进行分析。结果表明,选择合适的搪锡条件(<300℃/30s)、粘接剂的玻璃化转变温度指标、回流前的烘干除湿处理,以及对芯片/导电胶/镀银框架粘接体系的优化,减少芯片与基岛的面积比,均可有效减少同类塑封器件的分层风险,提升其使用可靠性。Taking the delamination failure of a certain type of plastic encapsulation analog integrated circuit(IC)as an example,the aim is to explore the relationship between delamination of plastic encapsulated devices and tin coating conditions,heat resistance of conductive adhesive,reflux conditions on the board,frame coating materials,and stress state after loading on the board.Combined with simulation model,the anti-stratification ability of the device is analyzed by ultrasonic scanning,SEM,TGA and other characterization methods.The results show that the selection of appropriate tinning conditions(<300℃/30 s),the Tg of the adhesive,the drying and dehumidifi cation treatment before refl ow,the optimization of the chip/conductive adhesive/silver-plated frame bonding system,and the reduction of the area ratio of the chip to the base island can effectively reduce the delamination risk of similar plastic packaging devices and improve their reliability.

关 键 词：模拟集成电路 塑封 分层 可靠性提升 

分 类 号：TN405[电子电信—微电子学与固体电子学]