Wafer-scale carbon-based CMOS PDK compatible with siliconbased VLSI design flow  

作　　者：Minghui Yin Haitao Xu Yunxia You Ningfei Gao Weihua Zhang Hongwei Liu Huanhuan Zhou Chen Wang Lian-Mao Peng Zhiqiang Li 

机构地区：[1]Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China [2]University of Chinese Academy of Sciences,Beijing 100049,China [3]State Key Lab of Fabrication Technologies for Integrated Circuits,Beijing 100029,China [4]Beijing Hua Tan Yuan Xin Electronics Technology Co.,Ltd.,Beijing 101399,China [5]Institute of Carbon-based Thin Film Electronics,Peking University,Shanxi 030012,China [6]Key Laboratory for the Physics and Chemistry of Nanodevices and Center for Carbon-based Electronics,School of Electronics,Peking University,Beijing 100871,China

出　　处：《Nano Research》2024年第8期7557-7566,共10页纳米研究（英文版）

基　　金：The authors gratefully acknowledge fundings from the Strategic Priority Research Program of Chinese Academy of Sciences(CAS)(No.XDA0330401);CAS Youth Interdisciplinary Team(No.JCTD-2022-07).

摘　　要：Carbon nanotube field-effect transistors(CNTFETs)are increasingly recognized as a viable option for creating high-performance,low-power,and densely integrated circuits(ICs).Advancements in carbon-based electronics,encompassing materials and device technology,have enabled the fabrication of circuits with over 1000 gates,marking carbon-based integrated circuit design as a burgeoning field of research.A critical challenge in the realm of carbon-based very-large-scale integration(VLSI)is the lack of suitable automated design methodologies and infrastructure platforms.In this study,we present the development of a waferscale 3μm carbon-based complementary metal-oxide-semiconductor(CMOS)process design kit(PDK)(3μm-CNTFETs-PDK)compatible with silicon-based Electronic Design Automation(EDA)tools and VLSI circuit design flow.The proposed 3μm-CNTFETs-PDK features a contacted gate pitch(CGP)of 21μm,a gate density of 128 gates/mm^(2),and a transistor density of 554 transistors/mm^(2),with an intrinsic gate delay around 134 ns.Validation of the 3μm-CNTFETs-PDK was achieved through the successful design and tape-out of 153 standard cells and 333-stage ring oscillator circuits.Leveraging the carbon-based PDK and a silicon-based design platform,we successfully implemented a complete 64-bit static random-access memory(SRAM)circuit system for the first time,which exhibited timing,power,and area characteristics of clock@10 kHz,122.1μW,3795μm×2810μm.This research confirms that carbon-based IC design can be compatible with existing EDA tools and silicon-based VLSI design flow,thereby laying the groundwork for future carbon-based VLSI advancements.

关 键 词：carbon nanotube field-effect transistors(CNTFETs) complementary metal-oxide-semiconductor(CMOS) process design kit(PDK) wafer-scale very-large-scale integration(VLSI) 

分 类 号：TB383[一般工业技术—材料科学与工程]