一种高PSR低静态电流LDO设计  

Design of High PSR and Low Quiescent Current Low-Dropout Linear Regulator

作　　者：王天凯 张瑛[1] 程双 杨华[1] 王宁[1] WANG Tiankai;ZHANG Ying;CHENG Shuang;YANG Hua;WANG Ning(College of Integrated Circuit Science and Engineering,Nanjing Univ.of Posts and Telecommun.,Nanjing 210023,P.R.China)

机构地区：[1]南京邮电大学集成电路科学与工程学院,南京210023

出　　处：《微电子学》2024年第2期221-227,共7页Microelectronics

基　　金：国家自然科学基金面上项目(61971240)。

摘　　要：设计了一种基于0.18μm BCD工艺的高电源抑制(PSR)低静态电流低压差线性稳压器(LDO)。详细分析了多条电源噪声传递路径对系统PSR的影响。为优化系统中低频段PSR,设计了一种双轨供电的三级误差放大器。此外还引入了预稳压单元,降低了电压基准模块对系统低频段PSR的影响。为降低系统的静态电流,设计了一种基于耗尽管的超低静态电流电压基准。仿真结果表明,该LDO在不同输出电压下静态电流仅5μA,并且在250 mA负载电流内PSR<-110 dB@1 kHz, PSR<-55 dB@1 MHz。A low-dropout linear regulator with high power supply rejection(PSR)and low quiescent current was designed using a 0.18μm BCD process.A detailed analysis was conducted on the effects of multiple power ripple propagation paths on the PSR of the system.A three-stage error amplifier with a dual-rail power supply was designed to optimize the PSR at low-middle frequency.Additionally,a pre-regulator was introduced to reduce the influence of the voltage reference module on the low-frequency PSR of the system.An ultra-low quiescent current-voltage reference based on the depletion transistor was designed to lower the quiescent current of the system.Simulation results demonstrate that the quiescent current can be as low as 5μA at different output voltages,and within a load current range of 250 mA,the PSR is below-110 dB at 1 kHz and below-55 dB at 1 MHz.

关 键 词：低压差线性稳压器 电源抑制 预稳压器 低静态电流 

分 类 号：TN433[电子电信—微电子学与固体电子学] TM44[电气工程—电器]