PCIe信号完整性与优化措施分析  

PCIe Signal Integrity Analysis and Optimization Measures Analysis

作　　者：汪红梅 吴忠良 汪红力 WANG Hongmei;WU Zhongliang;WANG Hongli(Inspur Computer Technology Co.,Ltd.,Jinan 250100,China;Nanjing Tianjia Environmental Technology Co.,Ltd.,Nanjing 210000,China)

机构地区：[1]浪潮计算机科技有限公司,济南250100 [2]南京天加环境科技有限公司,南京210000

出　　处：《移动信息》2024年第7期389-394,共6页MOBILE INFORMATION

摘　　要：作为高速串行总线技术的最新进展,PCIe 4.0对现代计算机系统的性能至关重要。然而,其高速的数据传输给信号完整性带来了巨大挑战。文中聚焦于PCIe 4.0信号的完整性,提出了一种创新的优化措施,采用一种新型模型和仿真策略,利用POWERSI构建了×4 PCIe 4.0链路模型,并在ADS环境中进行了多域仿真。仿真结果显示,8对差分信号的回波损耗低于-6 dB,插入损耗高于-28 dB,眼图参数完全符合PCIe 4.0标准,确保了信号质量。与传统方法相比,该方法显著提高了仿真的可靠性和准确性,为PCIe 4.0信号完整性的分析与优化提供了新的途径。As the latest development of high-speed serial bus technology,PCIe 4.0 is crucial for the performance of modern computer systems.However,its high-speed data transmission poses great challenges to signal integrity.This paper focuses on the integrity of PCIe 4.0 signals,and proposes an innovative optimization measure.Using a new model and simulation strategy,the×4 PCIe 4.0 link model is constructed using POWERSI,and multi-domain simulation is carried out in the ADS environment.The simulation results show that the return loss of 8 pairs of differential signals is lower than-6 dB,the insertion loss is higher than-28 dB,and the eye diagram parameters fully comply with the PCIe 4.0 standard,which ensures the signal quality.Compared with existing methods,this method significantly improves the reliability and accuracy of simulation,and provides a new way for the analysis and optimization of PCIe 4.0 signal integrity.

关 键 词：PCIe4.0 信号完整性 损耗 优化 

分 类 号：TN710[电子电信—电路与系统]