一种基于55 nm CMOS工艺的V波段高功率宽带功率放大器  

A V-band High-power Broadband Power Amplifier in 55 nm CMOS Technology

作　　者：肖晗 姜浩然 王研 陈强 桑磊 XIAO Han;JIANG Haoran;WANG Yan;CHEN Qiang;SANG Lei(School of Microelectronics,Hefei University of Technology,Hefei 230002,P.R.China;The 38th Research Institute of China Electronics Technology Group Corporation,Hefei 230031,P.R.China)

机构地区：[1]合肥工业大学微电子学院,合肥230002 [2]中国电子科技集团公司第三十八研究所,合肥230031

出　　处：《微电子学》2024年第3期369-374,共6页Microelectronics

基　　金：国家重点研发计划(2021YFA0715301)。

摘　　要：基于标准55 nm CMOS工艺设计了一款工作在V波段下的高输出功率宽带功率放大器,放大器采用交叉中和电容技术来提高功率放大器的增益和稳定性,并通过两路功率合成网络提高输出功率。通过多频点叠加技术设计级间变压器,拓展放大器带宽。仿真结果表明,在1.2 V电源电压下,放大器的3 dB带宽为14.5 GHz,静态直流功耗为184 mW,饱和输出功率为13.2 dBm,小信号增益为16.6 dB,具有高宽带、高输出功率的优点。A V-band high-power broadband power amplifier was designed in a 55-nm CMOS process.The neutralization capacitor technology was used to improve the gain and stability of the power amplifier.The two-way power combining network was adopted to increase output power.By distributing the peak gains of every stage at different frequencies,the gain bandwidth of the power amplifier achieves a wide and flat response.With a 1.2 V supply,the simulation result shows that the power amplifier consumes a DC power of 184 mW and achieves the 3-dB bandwidth of 14.5 GHz,the saturated output power(P_(sat)) of 13.2 dBm,the maximum power-added efficiency(PAE) of 10.2%,and the maximum small-signal gain of 16.6 dB,The proposed power amplifier has the advantages of broadband and high output power.

关 键 词：功率放大器 CMOS 毫米波集成电路 高功率 宽带 

分 类 号：TN722.75[电子电信—电路与系统] TN432