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作 者:顾勇 马杰 刘奥[2] 黄润华[2] 刘斯扬 柏松[2] 张龙 孙伟锋[1] GU Yong;MA Jie;LIU Ao;HUANG Run-hua;LIU Si-yang;BAI Song;ZHANG Long;SUN Wei-feng(School of Integrated Circuits,Southeast University,Nanjing,Jiangsu 210096,China;Nanjing Institute of Electronic Devices,Nanjing,Jiangsu 210016,China)
机构地区:[1]东南大学集成电路学院,江苏南京210096 [2]南京电子器件研究所,江苏南京210016
出 处:《电子学报》2024年第7期2183-2189,共7页Acta Electronica Sinica
基 金:国家自然科学基金(No.62274032,No.62174029);江苏省科技成果转化专项资金项目(No.BA2022005)~~。
摘 要:本文提出了一种基于N衬底P外延晶圆的全碳化硅(Silicon Carbide,SiC)集成工艺平台,该工艺平台兼容低压互补金属氧化物半导体场效应晶体管(Complementary Metal Oxide Semiconductor field-effect transistor,CMOS)、横向扩散金属氧化物半导体(Laterally-Diffused MOS,LDMOS)以及高压二极管等器件.采用P型缓冲层技术调节器件垂直方向电场分布,使高压器件垂直方向耐受电压提高212.4%;在1μm厚度的P型缓冲层和1μm厚度的P型外延层上,实现LDMOS、高压二级管和高侧区域耐受电压大于300 V.基于该工艺平台,搭建了SiC CMOS反相器和反相器链电路,均实现了0~20 V轨至轨的电压输出;设计了半桥驱动电路,低压侧驱动电路由四阶反相器构成;高压侧驱动电路由电平移位电路和高侧区域反相器链电路组成,实现了180~200 V浮空栅极驱动信号输出.An all silicon carbide integrated process platform based on the wafer with N-substrate and P-epitaxy is pro⁃posed in this paper,which is compatible with CMOS(Complementary Metal Oxide Semiconductor field-effect transistor)devices,LDMOS(Laterally-Diffused MOS)and high-voltage diodes.A P-buffer layer is adopted to modulate the vertically distributed electric field and potential,which results in 212.4%improvement in vertical voltage withstanding.The LDMOS,high voltage diode and high side region can achieve more than 300 V breakdown voltage in 2μm P-type epitaxial layer.Based on this platform,SiC(Silicon Carbide)CMOS inverter and inverter chain are constructed,all of which achieve volt⁃age output ranging from 0~20 V with rail-to-rail capability.A half-bridge driving circuit is designed with a four-stage invert⁃er chain as the low-side driver circuit.The high-side driver circuit consists of level-shifting circuit and a high-side region in⁃verter chain circuit,producing an output of 180~200 V floating gate drive signal.
关 键 词:碳化硅(SiC) 集成 碳化硅集成电路 碳化硅反相器 碳化硅横向扩散金属氧化物半导体
分 类 号:TN305[电子电信—物理电子学] TN432
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