基于加法树压缩和乘数编码优化的乘法器设计  

A multiplier design based on additive tree compression and multiplier encoding optimization

作　　者：王守华[1,2,3,4] 王明旭[1,2] 孙希延 Wang Shouhua;Wang Mingxu;Sun Xiyan(Guangxi Key Laboratory of Precision Navigation Technology and Application,Guilin University of Electronic Technology,Guilin 541004,China;Information and Communicaiton School,Guilin University of Electronic Technology,Guilin 541004,China;National&Local Joint Engineering Research Center of Satellite Navigation Positioning and Location Service,Guilin 541004,China;GUET-Nanning E-Tech Research Institute Co.,Ltd.,Nanning 530031,China)

机构地区：[1]桂林电子科技大学广西精密导航技术与应用重点实验室,广西桂林541004 [2]桂林电子科技大学信息与通信学院,广西桂林541004 [3]卫星导航定位与位置服务国家地方联合工程研究中心,广西桂林541004 [4]南宁桂电电子科技研究院有限公司,广西南宁530031

出　　处：《电子技术应用》2024年第9期73-76,共4页Application of Electronic Technique

基　　金：国家自然科学基金(62061010,62161007);广西精密导航技术与应用重点实验室基金项目(DH202301);广西科技厅项目(桂科AB21196041);桂林电子科技大学研究生教育创新计划项目(2023YCXS035)。

摘　　要：定点乘法器是现代信号处理常用的运算单元之一,其整体性能直接决定了系统的竞争力。为了乘法器的计算效率,设计了一种新型高能效有符号数乘法器,使用基4-Booth编码,减少了一半的部分积;另外使用直接求相反数的方法代替传统的取反加一求相反数的方法,使得部分积阵列比特数减少且形状规整,易于压缩。提出的3-2压缩器和半加器相混合的新型树型压缩结构硬件资源开销优化明显,对比现有的乘法器异或门数量下降了14%,二选一选择器数量下降了31%,总面积减少了50%,计算效率大大提高。The fixed-point multiplier is one of the commonly used computing units in modern signal processing,and its overall performance directly determines the competitiveness of the system.In order to improve the computational efficiency of the multiplier,a new type of energy-efficient signed number multiplier is designed,which uses the radix-4 booth encoder to reduce the partial product by half,and uses the method of directly finding the opposite number instead of the traditional method of taking the inverse plus one to find the opposite number,so that the number of bits of the partial product array is reduced,the shape is regular,and it is easy to compress.The new tree compression structure with a mixture of 3-2 compressor and half adder proposed in this paper has obvious optimization of hardware resource overhead.Compared with the existing multiplier XOR(Exclusive-OR)gate,the number of XOR gates is reduced by 14%,the number of selectors is reduced by 31%,the total area is reduced by 50%,and the computational efficiency is greatly improved.

关 键 词：乘法器 基4-Booth编码 3-2压缩器 高能效 

分 类 号：TN402[电子电信—微电子学与固体电子学]