Etching-free pixel definition in InGaN green micro-LEDs  

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作  者:Zhiyuan Liu Yi Lu Haicheng Cao Glen Isaac Maciel Garcia Tingang Liu Xiao Tang Na Xiao Raul Aguileta Vazquez Mingtao Nong Xiaohang Li 

机构地区:[1]Advanced Semiconductor Laboratory,Electrical and Computer Engineering Program,CEMSE Division,King Abdullah University of Science and Technology(KAUST),Thuwal 23955-6900,Kingdom of Saudi Arabia

出  处:《Light(Science & Applications)》2024年第8期1655-1665,共11页光(科学与应用)(英文版)

基  金:support of KAUST Baseline Fund BAS/1/1664-01-01,KAUST Competitive Research Grants URF/1/3437-01-01,URF/1/3771-01-01;KAUST Near-term Grand Challenge Fund REI/1/4999-01-01;KAUST Impact Acceleration Fund REI/1/5124-01-01.

摘  要:The traditional plasma etching process for defining micro-LED pixels could lead to significant sidewall damage.Defects near sidewall regions act as non-radiative recombination centers and paths for current leakage,significantly deteriorating device performance.In this study,we demonstrated a novel selective thermal oxidation(STO)method that allowed pixel definition without undergoing plasma damage and subsequent dielectric passivation.Thermal annealing in ambient air oxidized and reshaped the LED structure,such as p-layers and InGaN/GaN multiple quantum wells.Simultaneously,the pixel areas beneath the pre-deposited SiO_(2)layer were selectively and effectively protected.It was demonstrated that prolonged thermal annealing time enhanced the insulating properties of the oxide,significantly reducing LED leakage current.Furthermore,applying a thicker SiO_(2)protective layer minimized device resistance and boosted device efficiency effectively.Utilizing the STO method,InGaN green micro-LED arrays with 50-,30-,and 10-μm pixel sizes were manufactured and characterized.The results indicated that after 4 h of air annealing and with a 3.5-μm SiO_(2)protective layer,the 10-μm pixel array exhibited leakage currents density 1.2×10^(-6)A/cm^(2)at-10 V voltage and a peak on-wafer external quantum efficiency of~6.48%.This work suggests that the STO method could become an effective approach for future micro-LED manufacturing to mitigate adverse LED efficiency size effects due to the plasma etching and improve device efficiency.Micro-LEDs fabricated through the STO method can be applied to micro-displays,visible light communication,and optical interconnect-based memories.Almost planar pixel geometry will provide more possibilities for the monolithic integration of driving circuits with micro-LEDs.Moreover,the STO method is not limited to micro-LED fabrication and can be extended to design other III-nitride devices,such as photodetectors,laser diodes,high-electron-mobility transistors,and Schottky barrier diodes.

关 键 词:ANNEALING protective QUANTUM 

分 类 号:TN312.8[电子电信—物理电子学]

 

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