可重配置无源噪声整形SAR模数转换器设计  

Design of Reconfigurable Passive Noise Shaping SAR Analog-to-Digital Converter

作　　者：汪志强 WANG Zhiqiang(College of Physics and Information Engineering,Fuzhou University,Fuzhou 350108,China)

机构地区：[1]福州大学物理与信息工程学院,福建福州350108

出　　处：《仪表技术》2024年第5期13-17,共5页Instrumentation Technology

摘　　要：随着工业技术的提升,对模数转换器在精度与功耗上的要求日益增高。凭借噪声整形模数转换器的卓越性能,设计了一种可重配置的18位噪声整形的逐次逼近寄存器型模数转换器(SAR ADC)电路,利用SMIC 40 nm工艺实现,并通过仿真验证其理想模型,旨在探索其在物联网等领域的应用潜力。实验结果显示,该模数转换器在标准配置下以1 MS/s吞吐率实现了17.4位的有效位数,展现了高精度特性;通过重配置,其可切换至低功耗高速模式,吞吐率提升至5 MS/s,同时保持11.99位的有效精度,平衡了性能与功耗。这一可重配置设计不仅满足了高精度低功耗的需求,还因其灵活性而能广泛适用于多种数据采样场景,为物联网等领域的高性能模数转换器设计提供了创新方案。With the advancement of industrial technology,the requirements for accuracy and power consumption of analog-to-digital converters are increasing.Given the excellent performance of noise shaping analog-to-digital converters,this paper proposes a reconfigurable 18 bit noise shaping successive approximation register analog-to-digital converter(SAR ADC)circuit,which uses SMIC 40 nm technology.The ideal model is verified through simulation,aiming to explore its potential applications in fields such as the Internet of Things.The experimental results show that the analog-todigital converter achieves a 17.4-bit effective bit rate at a throughput of 1 MS/s under standard configuration,demonstrating high-precision characteristics.By reconfiguring,it can switch to low-power high-speed mode,increasing the throughput to 5 MS/s while maintaining an effective accuracy of 11.99 bits,balancing performance and power consumption.This reconfigurable design not only meets the requirements of high precision and low power consumption,but also can be widely applicable to various data sampling scenarios due to its flexibility,providing an innovative solutions for highperformance analog-to-digital converter design in fields such as the Internet of Things.

关 键 词：模数转换器 逐次逼近寄存器 噪声整形 无源积分器 可重配置 

分 类 号：TN792[电子电信—电路与系统]