三相交错并联直流变换器母排低电感设计  

Three-phase Interleaved Parallel DC/DC Converter Busbar Low Inductance Design

作　　者：陈卓 贾利民[1,2] 程鹏[1] 霍箭[3] CHEN Zhuo;JIA Li-min;CHENG Peng;HUO Jian(North China Electric Power University,Beijing 102206,China;不详)

机构地区：[1]华北电力大学,能源电力创新研究院,北京102206 [2]北京交通大学,先进轨道交通自主运行全国重点实验室,北京100044 [3]北京能高自动化技术股份有限公司,北京100044

出　　处：《电力电子技术》2024年第8期116-120,共5页Power Electronics

基　　金：国家重点研发计划(2021YFB2601400,2021YFB2-601600)。

摘　　要：由于开关器件频率的提升和电压等级的提高,功率回路中的杂散电感引起的冲击电压影响越来越受到关注。为解决在高频器件下因母排杂散电感引起的冲击电压过高的现象,将以往研究中的解析法建模和部分元等效两种方法结合起来建立能同时反映结构参数作用机理并反映各部分电感对冲击电压影响的综合电感模型。利用模型按照叠层方式设计、基础尺寸设计和器件布局设计3步设计了一款用于三相交错并联直流变换器的叠层母排。对于其中有着复杂影响效果的结构参数,将数学模型代入双层规划算法,进行了参数寻优。最终设计了一款低杂散电感、低冲击电压母排,并通过双脉冲实验验证了设计的有效性和模型的准确性。Due to the increase in frequency and voltage level of switching devices,the impact of impulse voltage caused by stray inductance in the power loop is becoming more and more of a concern.In order to solve the pheno-menon of excessive impulse voltage caused by busbar stray inductance under high-frequency devices,the analytical modeling and partial element equivalent methods are combined in previous studies to establish a comprehensive indu-ctance model that can reflect the mechanism of structural parameters and the influence of each part inductance on the impulse voltage.Based on the model,a multilayer busbar for three-phase interleaved parallel DC/DC converter is desi-gned according to the three steps of stacked design,basic size design and device layout design.For the structural para-meters with complex influencing effects,the mathematical model is substituted into the double-layer programming algori-thm,and the parameter optimization is carried out.Finally,a low stray inductance and low impulse voltage busbar is designed,and the effectiveness of the design and the accuracy of the model are verified by double pulse experiments.

关 键 词：杂散电感 变换器 叠层母排 

分 类 号：TM55[电气工程—电器]