高功率密度三相全桥SiC功率模块设计与开发  

Design and development of high power density three phase full bridge SiC power module

作　　者：回晓双 宁圃奇 李东润[1,2] 康玉慧 HUI Xiaoshuang;NING Puqi;LI Dongrun;KANG Yuhui(University of Chinese Academy of Sciences,Beijing 100049,China;Institute of Electrical Engineering,Chinese Academy of Sciences,Beijing 100019,China)

机构地区：[1]中国科学院大学,北京100049 [2]中国科学院电工研究所,北京100019

出　　处：《华中科技大学学报（自然科学版）》2024年第7期83-86,91,共5页Journal of Huazhong University of Science and Technology(Natural Science Edition)

基　　金：国家重点研发计划资助项目(2021YFB2500600);中国科学院青年交叉团队基金资助项目(JCTD-2021-09);中国科学院A类战略性先导科技专项课题(XDA28040100).

摘　　要：为满足快速发展的电动汽车行业对高功率密度SiC功率模块的需求,进行了1200 V/500 A高功率密度三相全桥SiC功率模块设计与开发,提出了一种基于多叠层直接键合铜单元的功率模块封装方法来并联更多的芯片.利用互感对消效应减小寄生电感,导电面积增加了1倍,以减小功率模块的总面积.在电磁学与热力学仿真分析的基础上,进行了实物制作与性能测试.仿真与实验结果表明:与传统的封装方法相比,该封装方法减少了34.9%的尺寸,并减少了74.8%的寄生电感,使得门极具有更高的稳定性,且当直流300 A电流时,单相最高结温为158℃.In order to meet the demand for high-power-density SiC power modules in the rapidly evolving electric vehicle industry,a design and development of a 1200 V/500 A high-power-density three-phase full-bridge SiC power module were undertaken.A power module packaging method based on multi-layer direct-bonded copper units was proposed to parallel more chips.This method leverages the mutual inductance cancellation effect to reduce parasitic inductance.Additionally,due to the doubled conductive area,the total module area was reduced.Physical fabrication and performance testing were conducted based on electromagnetic and thermodynamic simulation analyses.Simulation and experimental results indicate that,compared to traditional packaging methods,this approach reduces dimensions by 34.9%and decreases parasitic inductance by 74.8%,enhancing gate stability.Furthermore,at a direct current of 300 A,the highest junction temperature for a single phase is 158℃.

关 键 词：电动汽车 碳化硅芯片 功率模块 功率密度 封装 

分 类 号：TM46[电气工程—电器]