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作 者:秦宜峰 刘振华 施志贵[1] 张青芝 熊壮[1] QIN Yifeng;LIU Zhenhua;SHI Zhigui;ZHANG Qingzhi;XIONG Zhuang(Institute of Electronic Engineering,China Academy of Engineering Physics,Mianyang Sichuan 621999,China)
机构地区:[1]中国工程物理研究院电子工程研究所,四川绵阳621999
出 处:《太赫兹科学与电子信息学报》2024年第9期1038-1043,共6页Journal of Terahertz Science and Electronic Information Technology
摘 要:针对圆片级真空封装现有的检测难、易泄漏等问题,提出一种可与硅微器件工艺兼容、并行加工于同一腔体的皮拉尼(Pirani)计设计与加工方法,用于圆片级真空封装后腔体的真空度检测。采用SOI硅片对皮拉尼计结构进行加工,通过金硅键合方式对器件进行圆片级封装,同时采用硅通孔(TSV)的纵向电极引出方式,改善气密封装问题。测试结果表明,皮拉尼计电阻在线性区间的温度系数为1.58Ω/℃,检测敏感区间约为1~100 Pa,灵敏度达到61.67Ω/ln(Pa)。提出的皮拉尼计可与硅微器件并行加工,为圆片级真空封装腔体的真空度在片测试提供了一种简单可行的方案。In response to the existing challenges of difficult detection and potential leakage in wafer level vacuum packaging,a Pirani gauge design and processing method that is compatible with silicon micro-device processes and can be processed in parallel within the same cavity is proposed for vacuum degree detection after wafer-level vacuum packaging.The Pirani gauge structure is processed using SOI silicon wafers,and the device is packaged at the wafer level through gold-silicon bonding.At the same time,the longitudinal electrode lead-out method of Through Silicon-Vias(TSV)is adopted to improve the gas sealing issue.Test results show that the temperature coefficient of the Pirani gauge resistance in the linear range is 1.58Ω/℃,the detection sensitivity range is about 1~100 Pa,and the sensitivity reaches 61.67Ω/ln(Pa).The proposed Pirani gauge can be processed in parallel with silicon micro-devices,providing a simple and feasible solution for in-wafer testing of the vacuum degree in wafer-level vacuum packaging cavities.
分 类 号:TN305[电子电信—物理电子学]
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