Skyway:Accelerate Graph Applications with a Dual-Path Architecture and Fine-Grained Data Management  

作　　者：Mo Zou Ming-Zhe Zhang Ru-Jia Wang Xian-He Sun Xiao-Chun Ye Dong-Rui Fan Zhi-Min Tang 邹沫;张明喆;王茹嘉;孙贤和;叶笑春;范东睿;唐志敏(Institute of Computing Technology,Chinese Academy of Sciences,Beijing 100190,China;University of Chinese Academy of Sciences,Beijing 100049,China;Institute of Information Engineering,Chinese Academy of Sciences,Beijing 100045,China;Department of Computer Science,Illinois Institute of Technology,Chicago,IL 60616,U.S.A.)

机构地区：[1]Institute of Computing Technology,Chinese Academy of Sciences,Beijing 100190,China [2]University of Chinese Academy of Sciences,Beijing 100049,China [3]Institute of Information Engineering,Chinese Academy of Sciences,Beijing 100045,China [4]Department of Computer Science,Illinois Institute of Technology,Chicago,IL 60616,U.S.A.

出　　处：《Journal of Computer Science & Technology》2024年第4期871-894,共24页计算机科学技术学报（英文版）

基　　金：supported in part by the U.S.National Science Foundation under Grant Nos.CCF-2008907 and CCF-2029014;the Chinese Academy of Sciences Project for Young Scientists in Basic Research under Grant No.YSBR-029;the Chinese Academy of Sciences Project for Youth Innovation Promotion Association.

摘　　要：Graph processing is a vital component of many AI and big data applications.However,due to its poor locality and complex data access patterns,graph processing is also a known performance killer of AI and big data applications.In this work,we propose to enhance graph processing applications by leveraging fine-grained memory access patterns with a dual-path architecture on top of existing software-based graph optimizations.We first identify that memory accesses to the offset,edge,and state array have distinct locality and impact on performance.We then introduce the Skyway architecture,which consists of two primary components:1)a dedicated direct data path between the core and memory to transfer state array elements efficiently,and 2)a data-type aware fine-grained memory-side row buffer hardware for both the newly designed direct data path and the regular memory hierarchy data path.The proposed Skyway architecture is able to improve the overall performance by reducing the memory access interference and improving data access efficiency with a minimal overhead.We evaluate Skyway on a set of diverse algorithms using large real-world graphs.On a simulated fourcore system,Skyway improves the performance by 23%on average over the best-performing graph-specialized hardware optimizations.

关 键 词：graph application computer architecture memory hierarchy 

分 类 号：TP391.41[自动化与计算机技术—计算机应用技术]