SSA-over-array(SSoA):A stacked DRAM architecture for nearmemory computing  

作　　者：Xiping Jiang Fujun Bai Song Wang Yixin Guo Fengguo Zuo Wenwu Xiao Yubing Wang Jianguo Yang Ming Liu 

机构地区：[1]Institute of Microelectronics of the Chinese Academy of Sciences,Beijing 100029,China [2]School of Integrated Circuits,University of Chinese Academy of Sciences,Beijing 100029,China [3]Xi’an UniIC Semiconductors,Xi’an 710075,China [4]School of Microelectronics,University of Science and Technology of China,Hefei 230026,China

出　　处：《Journal of Semiconductors》2024年第10期42-53,共12页半导体学报（英文版）

基　　金：supported in part by the Strategic Priority Research Program of the Chinese Academy of Sciences under Grant No.XDB44000000。

摘　　要：Aiming to enhance the bandwidth in near-memory computing,this paper proposes a SSA-over-array(SSoA)architecture.By relocating the secondary sense amplifier(SSA)from dynamic random access memory(DRAM)to the logic die and repositioning the DRAM-to-logic stacking interface closer to the DRAM core,the SSoA overcomes the layout and area limitations of SSA and master DQ(MDQ),leading to improvements in DRAM data-width density and frequency,significantly enhancing bandwidth density.The quantitative evaluation results show a 70.18 times improvement in bandwidth per unit area over the baseline,with a maximum bandwidth of 168.296 Tbps/Gb.We believe the SSoA is poised to redefine near-memory computing development strategies.

关 键 词：near-memory vertical stacking SSA bandwidth density 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]