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作 者:陈夏楠 赵亮[1] CHEN Xianan;ZHAO Liang(School of Information Engineering,Southwest University of Science&Technology,Mianyang,Sichuan 621000,China)
机构地区:[1]西南科技大学信息工程学院,四川绵阳621000
出 处:《探测与控制学报》2024年第5期80-86,共7页Journal of Detection & Control
基 金:国家自然科学基金项目(U183010080);西南科技大学四川省产教融合示范项目(23cjkc24);自治区科技支疆项目(2022E02080)。
摘 要:针对SRAM型FPGA在辐射环境中易受高能粒子影响发生单粒子多位翻转的问题,提出一种基于改进位交织技术的(16,8)准循环码抗单粒子多位翻转容错方法。在分析FPGA的典型多位翻转错误图样的基础上,采用软容错中的错误检测与纠正思想将传统的(16,8)准循环码和改进位交织技术相结合来提高编解码的软容错能力。仿真和硬件平台试验表明,该方法可以实现对FPGA中由于单粒子效应所导致的至多五位突发错误的纠正和两位随机错误的检测,同时具有编解码不额外增加冗余位、实现简单和容错能力强的特点,为增强SRAM型FPGA在应用过程中的抗单粒子翻转能力、提高相关系统的辐照可靠性提供了可行途径。A(16,8)quasi-cyclic code fault-tolerant method based on improved bit interleaving technology was proposed to address the issue of single event multiple bits upset in SRAM type FPGAs susceptible to high-energy particles in radiation environments.Based on the analysis of typical multiple bits upset error patterns in FPGA,this article combined traditional(16,8)quasi-cyclic codes with improved bit interleaving technology to improve the soft fault tolerance of encoding and decoding using error detection and correction ideas in soft fault tolerance.Simulation and hardware platform experiments showed that this method could correct up to five bits burst errors and detect two bits random errors caused by single particle effects in FPGA.It also had the characteristics of encoding and decoding without additional redundant bits,simple implementation,and strong fault tolerance,which provided a feasible approach to enhance the single event overturning resistance of SRAM type FPGAs in the application process and improve the irradiation reliability of related systems.
关 键 词:SRAM型FPGA 单粒子多位翻转 改进准循环码 错误检测与纠正
分 类 号:TN432[电子电信—微电子学与固体电子学]
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