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作 者:沈炜 刘诗宇 杨光[1] 李东方 Shen Wei;Liu Shiyu;Yang Guang;Li Dongfang(Institute 706,Second Academy of CASIC,Beijing 100854,China)
机构地区:[1]中国航天科工集团第二研究院706所,北京100854
出 处:《电子技术应用》2024年第10期98-104,共7页Application of Electronic Technique
基 金:国防基础科研计划(XX2020204B028)。
摘 要:密码芯片是密码算法实现的重要载体,在信息系统中承担了加解密、签名、认证等功能,侧信道分析是检测密码芯片安全性的重要手段,当前行业内通常采用专用设备进行侧信道分析,该方法存在发现时间晚、修复成本高、硬件设备昂贵等问题。研究面向密码芯片设计阶段的能量采集与侧信道分析方法,采用EDA工具在设计阶段对密码芯片的RTL代码进行功能仿真,通过分析仿真生成的波形记录文件,实现对能量迹的模拟和采集。采用Welch t检验、KL散度和相关能量分析方法,实现了对芯片RTL代码的泄漏检测、泄漏定位和侧信道攻击。通过对AES-128 RTL设计的仿真实验,证明了该方法能够正确地反映能量泄漏情况,且能够在不借助专用硬件设备的条件下实现对密码芯片早期设计阶段的侧信道泄漏安全风险检测。Cryptographic chip is an important carrier for cryptographic algorithms,which implements functions such as encryption,decryption,signature,and authentication of information system.Side channel analysis is an important method to verify the security of cryptographic chips.In the current industry,post-silicon side channel analysis with special equipment is a common method,which is too late and expensive in making any changes to the design to solve the leakage issue.This paper proposes a simulation-based power trace acquisition and side channel analysis method.EDA tools are used to perform functional simulation on the RTL code of the cryptographic chip during the design phase,and we collect the simulated power trace by analyzing the waveform record file.By using Welch t test,KL divergence and correlation energy analysis,leakage can be located in time and space dimensions.Through the side channel analysis experiment on AES-128 RTL design,we proved that the method proposed in this paper can correctly reflect the power leakage,which can detect the side channel leakage risk in the early stage of the cryptographic chip design without the help of special hardware equipment.
分 类 号:TP311.5[自动化与计算机技术—计算机软件与理论]
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