一种PCIe转RapidIO扩展卡设计与实现  

Design and implementation of a PCIe-to-RapidIO add-in card

作　　者：张恒 王琪 郁文君 Zhang Heng;Wang Qi;Yu Wenjun(The 58th Research Institute of China Electronics Technology Group,Wuxi 214072,China)

机构地区：[1]中国电子科技集团公司第五十八研究所,江苏无锡214072

出　　处：《电子技术应用》2024年第10期110-114,共5页Application of Electronic Technique

摘　　要：RapidIO总线是一种广泛应用于嵌入式系统内部互联的高性能互联总线,具有高带宽、低延迟、支持多处理器等特征。针对目前市面上大多数处理器不支持RapidIO总线的问题,基于国产PCIe转RapidIO控制器设计了一款PCIe扩展卡,详细介绍了该PCIe扩展卡各模块硬件设计方案,并搭建测试环境对RapidIO总线的眼图和DMA传输性能进行测试。经测试,当RapidIO总线传输速率配置为5 Gb/s时,RapidIO总线DMA读写速率分别为1677 MB/s和1711 MB/s。RapidIO bus is a high-performance interconnect bus which is widely used in embedded systems.It has the characteristics of high bandwidth,low latency,and multiple processors supported.In response to the problem that most processors on the market currently don’t support the RapidIO bus,a PCIe add-in card based on domestic PCIe to RapidIO controller was designed.The hardware design of each module of the PCIe add-in card was introduced in detail,and a testing environment was built to test the eye diagram and DMA transmission rate of the RapidIO bus.By testing,when the transfer rate of the RapidIO bus is configured as 5 Gb/s,the DMA read and DMA write rates of the RapidIO bus are 1677 MB/s and 1711 MB/s,respectively.

关 键 词：RapidIO总线 PCIE PCIe转RapidIO控制器 眼图 DMA传输 

分 类 号：TN92[电子电信—通信与信息系统]