多位平面循环的优化截取内嵌码块编码VLSI结构  

VLSI architecture for multi bit plane cyclic embedded block coding with optimized truncation encoding

作　　者：章楚邯 肖永生[1] 杨培靖 黄丽贞[1] 廖峰 Zhang Chuhan;Xiao Yongsheng;Yang Peijing;Huang Lizhen;Liao Feng(School of Information Engineering,Nanchang Hangkong University,Nanchang 330063,China;Shanghai Aerospace Electronics Co.,Ltd.,Shanghai 201821,China;Jiangxi Hongdu Aviation Industry Group Co.,Ltd.,Nanchang 330200,China)

机构地区：[1]南昌航空大学信息工程学院,南昌330063 [2]上海航天电子有限公司,上海201821 [3]江西洪都航空工业集团有限责任公司,南昌330200

出　　处：《中国图象图形学报》2024年第10期3047-3059,共13页Journal of Image and Graphics

基　　金：国家自然科学基金项目(62261040);江西省自然科学基金项目(20232BAB202006);航空科学基金项目(20200020056001)。

摘　　要：目的EBCOT(embedded block coding with optimized truncation)优化截取内嵌码块编码的结果对JPEG2000的压缩质量产生直接影响,且EBCOT编码在整个JPEG2000压缩过程中占据较长时间。此外,由于该算法的复杂性较高,在硬件实现时需要考虑其对硬件资源的使用率。对此,提出了一种高效的EBCOT编码VLSI(very large scale integration circuit)结构。方法首先,EBCOT编码分为两部分:Tier1编码与Tier2编码。针对影响编码速度的Tier1编码部分,设计了一种全新的编码窗口结构,即多位平面循环编码(multi-bitplanes cyclic encoding,MBCE),其通过预测的方式对连续的位平面进行编码;针对Tier2编码部分中的通道失真误差计算,设计了与Tier1编码并行的流水线计算结构。结果采用Verilog语言对该VLSI结构进行描述,将FPGA(field programmable gate array)作为实验验证平台,从多个角度与现有的EBCOT优化VLSI结构进行比较。从编码效率上来看,MBCE结构在实现全通道并行的基础上,编码效率有明显的提升、所占用的硬件资源较少、工作频率较高。在同一压缩条件下,使用MBCE结构与以JPEG2000为标准的图像压缩软件对同一幅512×512像素的8位灰度图像进行压缩对比,峰值信噪比(peak signal-to-noise ratio,PSNR)的误差不超过0.05 dB,在xc4vlx25型号FPGA上其工作频率可以达到193.1 MHz,每秒能够处理370帧图像。结论本文提出的全通道MBCE的EBCOT编码VLSI结构,具有资源占用率低、编码周期短、压缩质量好的特点。Objective JPEG2000 is composed of multiple image encoding algorithms,with embedded block coding with optimized truncation(EBCOT)serving as the core encoding algorithm.EBCOT is a key algorithm in JPEG2000 image compression standard,and its coding results directly affect the compression quality of images.EBCOT encoding is internally composed of Tier1 encoding and Tier2 encoding.Tier1 encoding is responsible for encoding the quantized wavelet coefficients.This process is the core of EBCOT encoding to achieve compression effect;thus,it requires substantial resources in hardware implementation to ensure the efficiency and accuracy of data output.Tier2 encoding is responsible for truncating and packaging the encoding results of Tier1,and its encoding results affect the compression rate and compression effect of JPEG2000.Tier2 encoding takes less time,and the rate distortion calculation can be completed simultaneously with Tier1 encoding,shortening the compression time.At the same time,given the inherent intricacies of the algorithm,a diligent consideration of hardware resource utilization is imperative during its implementation in hardware.This cautious approach ensures the judicious employment of limited hardware resources toward the realization of an efficient EBCOT encoding tailored for JPEG2000 image compression.Therefore,to solve these problems,a parallel EBCOT coding very large scale integration circuit(VLSI)architecture with all pass multi bit plane cyclic coding is proposed.Method The EBCOT encoding process has two main parts:Tier1 encoding and Tier2 encoding.A novel encoding window structure,i.e.,multi bit plane cyclic encoding(MBCE),is designed to address the encoding speed in the Tier1 encoding part.The encoding window consists of four encoding columns:completed encoding column,current encoding column,prediction column,and updated prediction column.The 5×4 encoding window in question exploits the encoding information of each bit plane layer to parallelize the encoding process,effectively breaking the interp

关 键 词：EBCOT编码 多位平面循环编码(MBCE) 通道失真计算 通道并行 VLSI结构 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]