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作 者:ZHANG Chen WANG Jian FAN Guangteng TIAN Shiwei
机构地区:[1]College of Electronic Science and Technology,National University of Defense Technology,Changsha 410073,China [2]National Innovation Institute of Defense Technology,Academy of Military Science,Beijing 100071,China
出 处:《Journal of Systems Engineering and Electronics》2024年第5期1063-1072,共10页系统工程与电子技术(英文版)
基 金:supported by the National Natural Science Foundation of China(61801503).
摘 要:Code acquisition is the kernel operation for signal synchronization in the spread-spectrum receiver.To reduce the computational complexity and latency of code acquisition,this paper proposes an efficient scheme employing sparse Fourier transform(SFT)and the relevant hardware architecture for field programmable gate array(FPGA)and application-specific integrated circuit(ASIC)implementation.Efforts are made at both the algorithmic level and the implementation level to enable merged searching of code phase and Doppler frequency without incurring massive hardware expenditure.Compared with the existing code acquisition approaches,it is shown from theoretical analysis and experimental results that the proposed design can shorten processing latency and reduce hardware complexity without degrading the acquisition probability.
关 键 词:code acquisition hardware structure sparse Fourier transform(SFT) code phase estimation Doppler frequency estimation
分 类 号:TN914.42[电子电信—通信与信息系统]
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