基于FPGA的多路同步数据采集系统设计  

Design of multi⁃channel synchronous data acquisition system based on FPGA

作　　者：王浩骅 贾云飞[1] 储剑 徐强[1] WANG Haohua;JIA Yunfei;CHU Jian;XU Qiang(School of Mechanical Engineering,Nanjing University of Science and Technology,Nanjing 210094,China)

机构地区：[1]南京理工大学机械学院,江苏南京210094

出　　处：《电子设计工程》2024年第22期101-104,110,共5页Electronic Design Engineering

摘　　要：针对传统飞行器采集系统存在通道数量增加和同步采样性能提升间的矛盾,设计了一套以CYCLONE4系列FPGA为主控核心的64通道数据同步采集系统,完善了硬件结构并通过Verilog语言利用FPGA的高并行处理特性对多个并行排列的ADC进行同步控制,结合三级缓存结构实现对数据的可靠缓存和固化,经测试,采集系统的16位A/D的量化误差低于基本噪声的最低水平,满足精度的要求;并且可以实现64通道高同步数据采集,满足系统对同步性的要求。该研究为解决相关领域的实际问题提供了实用性参考。This paper aims at the contradiction between the number of channels and synchronous sampling in the traditional aircraft acquisition system.A set of 64-channel data synchronous acquisition system with CYCLONE4 series FPGA as the main control core was designed,the hardware structure was improved,and multiple parallel ADCs were synchronously controlled by Verilog language using the high parallel processing characteristics of FPGA,and the reliable data caching and solidification was realized by combining the three⁃level cache structure.The quantization error of 16 bit A/D is less than the lowest level of basic noise,which meets the requirement of accuracy.And it can realize 64 channels of high synchronous acquisition to meet the requirements of the system for synchronization.The study provide a practical reference for solving practical problems in related fields.

关 键 词：数据采集 多通道 同步 FPGA AD7606 

分 类 号：TN98[电子电信—信息与通信工程]