Sub-5 nm bilayer GaSe MOSFETs towards ultrahigh on-state current  

作　　者：Xueping Li Xiaojie Tang Zhuojun Wang Peize Yuan Lin Li Chenhai Shen Congxin Xia 

机构地区：[1]College of Electronic and Electrical Engineering,Henan Normal University,Xinxiang 453007,China [2]Henan Key Laboratory of Optoelectronic Sensing Integrated Application,Xinxiang 453007,China [3]School of Physics,Henan Normal University,Xinxiang 453007,China

出　　处：《Frontiers of physics》2024年第5期143-151,共9页物理学前沿（英文版）

基　　金：supported by the National Natural Science Foundation of China(Grants Nos.12374070 and 12074103);the Foundation for University Key Young Teacher of Henan(Grant No.2023GGJS035);Henan Province Postdoctoral Project Launch Funding(Grant No.5201029430112);the Science and Technology Program of Henan(Grant No.232102230080);supported by the High Performance Computing Center of Henan Normal University.

摘　　要：Dielectric engineering plays a crucial role in the process of device miniaturization.Herein we investigate the electrical properties of bilayer GaSe metal-oxide-semiconductor field-effect transistors(MOSFETs),considering hetero-gate-dielectric construction,dielectric materials and GaSe stacking pattern.The results show that device performance strongly depends on the dielectric constants and locations of insulators.When highk dielectric is placed close to the drain,it behaves with a larger on-state current(I_(on))of 5052μA/μm when the channel is 5 nm.Additionally,when the channel is 5 nm and insulator is HfO_(2),the largest I_(on) is 5134μA/μm for devices with AC stacking GaSe channel.In particular,when the gate length is 2 nm,it still meets the HP requirements of ITRS 2028 for the device with AA stacking when high-k dielectric is used.Hence,the work provides guidance to regulate the performance of the two-dimensional nanodevices by dielectric engineering.

关 键 词：GaSe stacking pattern metal-oxide-semiconductor field-effect transistors(MOSFETs) ultrahigh on-state current dielectric engineering 

分 类 号：TN32[电子电信—物理电子学] O44[理学—电磁学]