Performance-Oriented Layout Synthesis for Quantum Computing  

作　　者：Chi-Chou Kao Hung-Yi Lin 

机构地区：[1]Department of Computer Science and Information Engineering,National University of Tainan,Tainan,700301,Taiwan,China [2]Department of Electrical Engineering,National University of Kaohsiung,Kaohsiung,811,Taiwan,China

出　　处：《Computer Systems Science & Engineering》2024年第6期1581-1594,共14页计算机系统科学与工程（英文）

基　　金：supported by National Science and Technology Council,Taiwan,NSTC 112-2221-E-024-004.

摘　　要：Layout synthesis in quantum computing is crucial due to the physical constraints of quantum devices where quantum bits(qubits)can only interact effectively with their nearest neighbors.This constraint severely impacts the design and efficiency of quantum algorithms,as arranging qubits optimally can significantly reduce circuit depth and improve computational performance.To tackle the layout synthesis challenge,we propose an algorithm based on integer linear programming(ILP).ILP is well-suited for this problem as it can formulate the optimization objective of minimizing circuit depth while adhering to the nearest neighbor interaction constraint.The algorithm aims to generate layouts that maximize qubit connectivity within the given physical constraints of the quantum device.For experimental validation,we outline a clear and feasible setup using real quantum devices.This includes specifying the type and configuration of the quantum hardware used,such as the number of qubits,connectivity constraints,and any technological limitations.The proposed algorithm is implemented on these devices to demonstrate its effectiveness in producing depth-optimal quantum circuit layouts.By integrating these elements,our research aims to provide practical solutions to enhance the efficiency and scalability of quantum computing systems,paving the way for advancements in quantum algorithm design and implementation.

关 键 词：Quantum computing layout placement and routing SCHEDULING ALLOCATION OPTIMALITY 

分 类 号：O413[理学—理论物理]