极低信噪比下分层归一化QC-Hadamard-LDPC译码器设计  

Design of layered normalized QC-hadamard-LDPC decoder for extremely low SNR regime

作　　者：肖磊 XIAO Lei(Southwest China Institute of Electronic Technology,Chengdu 610036,China;School of Automation Engineering,University of Electronic Science and Technology of China,Chengdu 611731,China)

机构地区：[1]西南电子技术研究所,四川成都610036 [2]电子科技大学自动化工程学院,四川成都611731

出　　处：《微电子学与计算机》2024年第11期75-82,共8页Microelectronics & Computer

基　　金：四川省自然科学基金(2022NSFSC0905)。

摘　　要：传统LDPC码在低信噪比环境下性能较差,借助Hadamard约束构造的Hadamard-LDPC码是一类可逼近香农极限的低码率码字。但是Hadamard-LDPC译码常常采用基于符号最大后验概率的方法,译码过程存在大量指数、对数等非线性运算,计算复杂度高、迭代时延长,不利于工程应用实现。提出了一种基于Max-Log-MAP规则的分层归一化QC-Hadamard-LDPC译码器,用加法、比较运算替代指数、对数运算,实现仅包含线性运算的译码器,显著降低计算量和译码时延。同时,针对线性运算引入外信息失真导致性能下降的现象,引入了归一化因子对外信息进行修正,从而在保证尽量减小译码性能损失的同时实现低复杂度快速译码。基于Xilinx UltraScale+的硬件验证结果表明,分层归一化QC-Hadamard-LDPC译码器在消息长度1024、迭代次数20次条件下,可取得E_(b)/N_(0)为0.4 dB时误码率10^(−5)、信息吞吐率313 Mbps的性能,相比于传统最大后验概率译码器,译码性能损失仅0.03 dB,资源消耗减少20%。Traditional low density parity check codes(LDPC)perform poorly in low signal-to-noise ratio environments,the low density parity check Hadamard code(Hadamard-LDPC)is considered to be a new type of ultimate-Shannon-limitapproaching code.The traditional Hadamard-LDPC decoder exploits the symbol-maximum-a-posteriori probability(Symbol-MAP)rule which introduces logarithmic and exponential operations,leading to high computational complexity and high resources occupation,which is not conducive to the implementation of engineering applications.This paper proposes a Max-log-MAP rule-based layered normalized QC-Hadamard-LDPC decoding algorithm which utilizes additive and comparison operations instead of non-linear ones so that the decoding complexity can be efficiently reduced.To further cope with the performance degradation and extrinsic information distortion caused by the introduced linear computations,a normalization factor is introduced and optimized in terms of the bit error rate(BER)performance.The entire system is implemented on an FPGA board.A bit error rate of 10^(−5) can be achieved at E_(b)/N_(0)=0.4 dB with a moderate message bits length 1 024 and a throughput of 313 Mbps. The layered decoder using 20 decoding iterations shows twenty percent decrease of resource utilization at a slight sacrifice of a very small degradation of 0.03 dB, compared with the standard decoder.

关 键 词：QC-Hadamard-LDPC码 分层归一化译码 Max-Log-MAP规则 FPGA 

分 类 号：TN911.22[电子电信—通信与信息系统]