一种支持多比特网络的电荷域存内计算电路  

A charge-domain memory computing circuit supporting a multi-bit network

作　　者：杨子翼 任二祥 张静[1] 杨兴华 魏琦[4] 乔飞[4] YANG Ziyi;REN Erxiang;ZHANG Jing;YANG Xinghua;WEI Qi;QIAO Fei(School of Information,North China University of Technology,Beijing 100144,China;School of Electronic Information Engineering,Beijing Jiao tong University,Beijing 100044,China;College of Science,Beijing Forestry University,Beijing 100083,China;Department of Electronic Engineering,Tsinghua University,Beijing 100084,China)

机构地区：[1]北方工业大学信息学院,北京100144 [2]北京交通大学电子信息工程学院,北京100044 [3]北京林业大学理学院,北京100083 [4]清华大学电子工程系,北京100084

出　　处：《微电子学与计算机》2024年第11期83-89,共7页Microelectronics & Computer

摘　　要：为了满足更多的应用场景,智能感知设备面临算力和功耗两方面的挑战。提出了一种支持多层多bit的CIM架构,平衡了高算力和低功耗的需求。该架构中的CIM单元本身具有性能优势,不仅支持架构的集成,并且取得了较好的系统性能。该CIM单元在标准的6T-SRAM的基础上,提出了一种由8个晶体管和一个金属-氧化物-金属(MOM)电容的CIM单元,其中MOM电容与SAR ADC中的电容进行了复用,节约了功耗和面积。在电荷域实现了有符号数的乘累加(MAC)计算操作,并将ResNet14网络部署到了该CIM架构中,实现了1w4a和4w4a的计算。基于40 nm CMOS工艺完成设计实现,片上容量为576 kB,在10 MHz工作频率下可以实现358.154 GOPS的吞吐率和41 TOPS/W的后仿能效。In order to meet more application scenarios,intelligent sensing devices have to face the challenges of computing power and power consumption.This work proposes a CIM architecture that supports multi-layer and multi-bit.Balance the need for high computing power and low power consumption.The CIM unit in this architecture has its own performance advantages,not only supporting the integration of the architecture,but also achieving better system performance.This CIM unit circuit proposes a CIM unit based on the standard 6T-SRAM,four transistors and a Metal-Oxide-Metal(MOM)capacitor.The MOM capacitor is shared with the capacitor in SAR ADC.This method saves power consumption and area.Multiply-And-Accumulate(MAC)computation of signed number is realized in charge domain.The ResNet14 network is deployed in the CIM architecture,this work can achieve calculations of 1 bit weight,4 bit activation(1w4a)and 4 bit weight,4 bit activation(4w4a).The design is implemented using 40 nm CMOS technology,with on-chip memory of 576 KB,achieving a pre-simulation energy efficiency of 353.2 TOPS/W and a throughput rate of 716.308 GOPS at a working frequency of 10 MHz.

关 键 词：SRAM 存内计算 电荷域 多比特网络 

分 类 号：TN432[电子电信—微电子学与固体电子学]